SBAU395 april   2023 DAC39RF10

 

  1.   Introduction
  2. 1Trademarks
  3. 2Required Equipment
  4. 3Setup Procedure
    1. 3.1  Installing the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Installing the DAC39RF10EVM Configuration GUI Software
    3. 3.3  Connect the DAC39RF10EVM and TSW14J59EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Spectrum Analyzer to the EVM
    6. 3.6  Turn On the TSW14J59EVM Power and Connect to the PC
    7. 3.7  Turn On the DAC39RF10EVM Power Supplies and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Launch the DAC39RF10EVM GUI and Program the DAC EVM
    10. 3.10 Programming the NCO
      1. 3.10.1 SPIDAC( NCO only) Operation
    11. 3.11 Launch the HSDCpro Software and Load the FPGA Image to the TSW14J59EVM
  5. 4Device Configuration
    1. 4.1 Supported JESD204C Device Features
    2. 4.2 Tab Organization
    3. 4.3 Register Map and Console Control
  6. 5Troubleshooting the DAC39RF10EVM
  7. 6References
    1. 6.1 Technical Reference Documents
    2. 6.2 TSW14J59EVM Operation
  8. 7Appendix
    1. 7.1 Customizing the EVM for Optional Clocking Support
      1. 7.1.1 LMX->DACCLK | LMX/LMK-> FPGA option (Default)
      2. 7.1.2 EXT->DACCLK | LMX/LMK-> FPGA Clocking Option
      3. 7.1.3 EXT->DACCLK | LMK-> FPGA Clocking Option
    2. 7.2 Signal Routing
    3. 7.3 Analog Outputs
    4. 7.4 Jumpers and LEDs

1 Introduction

The DAC39RF10EVM is an evaluation board used to evaluate the DAC39RF10, digital-to-analog converters (DAC) from Texas Instruments.The DAC39RF10 is a family of single and dual channel digital-to-analog converter (DAC) with 16-bit resolution. The devices can be used as single channel or dual channel non-interpolation DACs. The device can also be used as interpolating DACs in either direct RF sampling mode or baseband mode. The maximum input data rate is 20.48 GSPS in single channel mode or 10.24 Gsps in dual channel mode or baseband mode. The device can generate signals of up to 10, 7.5, and 5 GHz signal bandwidth (8, 12, and 16-bit input resolution) at carrier frequencies exceeding 8 GHz enabling direct sampling through C-band and into X-band This evaluation board also includes the following important features:

  • Transformer-coupled signal output network allowing a single-ended signal output

    with an option to bypass the transformer and use the outputs differentially.

  • The LMX1204 clock chip distributes the DAC sampling clock
  • The LMK04828, clock generator generates SYSREF and FPGA reference clocks for the high-speed serial interface
  • Transformer-coupled clock input network to test the DAC performance with an external low-noise clock source
  • High-speed serial data output over a High Pin Count FMC+ interface connector
    Note:

    To improve signal routing quality, serial lane polarity is inverted with respect to the standard FMC VITA-57 signal mapping. Signal mapping and polarity is shown in Table 7-1).

  • Device register programming through USB connector and FTDI USB-to-SPI bus translator with option to program from FGPA using SPI through FMC+ connector
GUID-20230416-SS0I-T0TW-PPNT-7WS1GJW2XXSC-low.svgFigure 1-1 EVM Orientation

DAC39RF10EVM can use used with the TSW14J59EVM board(pattern generator board). TSW14J59EVM can quickly and easily interface with the DAC39RF10EVM.

Note:

For now only 64b/66b encoding modes from serdes data rate from 6Gbps to 12.8Gbps are supported by the TSW14J59EVM. The support for 8b/10b modes and lower serdes rate will be added to future release of HSDCpro software.

The High-Speed Data Converter Pro (HSDC Pro) software is used to communicate with the TSW14J59EVM and is used to generates the data pattern for DAC39RF10.

The TSW14J59EVM takes the generated data pattern, encodes the data, stores the data in memory, and then sends to DAC39RF10EVM through the the high-speed serial data link(JESD interface).

With proper hardware selection in the HSDC Pro software, the TSW14J59 board is automatically configured to support a wide range of operating speeds of the DAC39RF10EVM, but the TSW14J59EVM board may not cover the full operating range of the DAC device.