SPRADD4 October   2023 AM625SIP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Via Channel Arrays
  6. 3 Width/Spacing Proposal for Escapes
  7. 4 Stackup
  8. 5 Via Sharing
  9. 6 Floorplan Component Placement
  10. 7 Critical Interfaces Impact Placement
  11. 8 Routing Priority
  12. 9 SerDes Interfaces
  13. 10Power Decoupling
  14. 11Route Lowest Priority Interfaces Last
  15. 12Summary
Application Note

AM62x SiP Escape Routing for PCB Design