JAJSMI7A July   2022  – December 2022 OPA817

PRODUCTION DATA  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
4. 4 Revision History
5. 5 Device Comparison Table
6. 6 Pin Configuration and Functions
7. 7 Specifications
   1. 7.1 Absolute Maximum Ratings
   2. 7.2 ESD Ratings
   3. 7.3 Recommended Operating Conditions
   4. 7.4 Thermal Information
   5. 7.5 Electrical Characteristics: VS = ±5 V
   6. 7.6 Typical Characteristics: VS = ±5 V
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 FET-Input Architecture with Wide Gain-Bandwidth Product
      4. 8.3.4 Device Functional Modes
         1. 8.3.4.1 Power-Down (PD) Pin
9. 9 Application and Implementation
   1. 9.1 Application Information
      1. 9.1.1 Wideband, High-Input Impedance DAQ Front-End
   2. 9.2 Typical Applications
      1. 9.2.1 High Input Impedance, 200 MHz, Digitizer Front-End Amplifier Design
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
10. 10Power Supply Recommendations
11. 11Layout
    1. 11.1 Layout Guidelines
       1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
12. 12Device and Documentation Support
    1. 12.1 Device Support
       1. 12.1.1 Development Support
    2. 12.2 Documentation Support
       1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
13. 13Mechanical, Packaging, and Orderable Information