JAJSQ88E
february 2006 – october 2020
SN65LVDS301
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings #GUID-B6F760D2-14EB-4E2D-91AA-4EF9E63722A7/SLLS6819275
6.2
Thermal Information
6.3
Recommended Operating Conditions
6.4
Device Electrical Characteristics
6.5
Output Electrical Characteristics
6.6
Input Electrical Characteristics
6.7
Switching Characteristics
6.8
Timing Characteristics
6.9
Device Power Dissipation
6.10
Typical characteristics
7
Parameter Measurement Information
19
7.1.1
Power Consumption Tests
7.1.1.1
Typical IC Power Consumption Test Pattern
7.1.1.2
22
7.1.2
Maximum Power Consumption Test Pattern
7.1.3
Output Skew Pulse Position & Jitter Performance
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Swap Pin Functionality
8.3.2
Parity Bit Generation
8.4
Device Functional Modes
8.4.1
Serialization Modes
8.4.1.1
1-Channel Mode
8.4.1.2
2-Channel Mode
8.4.1.3
3-Channel Mode
8.4.2
Powerdown Modes
8.4.3
Shutdown Mode
8.4.4
Standby Mode
8.4.5
Active Modes
8.4.6
Acquire Mode (PLL approaches lock)
8.4.7
Transmit Mode
8.4.8
Status Detect and Operating Modes Flow diagram
9
Application information
9.1
Application Information
9.2
Preventing Increased Leakage Currents in Control Inputs
9.3
VGA Application
9.4
Dual LCD-Display Application
9.5
Typical Application Frequencies
9.5.1
Calculation Example: HVGA Display
10
Power Supply Design Recommendation
10.1
Decoupling Recommendation
11
Layout
11.1
Layout Guidelines
12
Device and Documentation Support
12.1
サポート・リソース
12.2
Trademarks
12.3
静電気放電に関する注意事項
12.4
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ZXH|80
MPBGAI9
サーマルパッド・メカニカル・データ
発注情報
jajsq88e_oa
jajsq88e_pm
Data Sheet
SN65LVDS301 プログラマブル 27 ビット・パラレル / シリアル・トランスミッタ