SLVSCT3 March   2015 TPS51275B-1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application Diagram
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PWM Operations
      2. 8.3.2  Adaptive On-Time and PWM Frequency Control
      3. 8.3.3  Light-Load Condition in Out-of-Audio Operation
      4. 8.3.4  Enable and Power Good
      5. 8.3.5  Soft-Start and Discharge
      6. 8.3.6  VREG5 and VREG3 Linear Regulators
      7. 8.3.7  VCLK for Charge Pump
      8. 8.3.8  Overcurrent Protection
      9. 8.3.9  Output Overvoltage and Undervoltage Protection
      10. 8.3.10 Undervoltage Lockout Protection
      11. 8.3.11 Over-Temperature Protection (OTP)
    4. 8.4 Device Functional Modes
      1. 8.4.1 D-CAP Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Components Selection
          1. 9.2.2.1.1 Step 1. Determine the Value of R1 and R2
          2. 9.2.2.1.2 Step 2. Select the Inductor
          3. 9.2.2.1.3 Step 3. Select Output Capacitors
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Placement
      2. 11.1.2 Routing (Sensitive Analog Portion)
      3. 11.1.3 Routing (Power portion)
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Input Voltage Range: 5 V to 24 V
  • Output Voltages: 5 V and 3.3 V (Adjustable Range ±10%)
  • Built-in, 100-mA, 5-V, and 3.3-V LDOs
  • Clock Output for Charge-Pump
  • ±1% Reference Accuracy
  • Adaptive On-Time D-CAP™ Mode Control Architecture with 300-kHz and 355-kHz Frequency Setting
  • Out-of-Audio™ (OOA) Light-Load Operation
  • Internal 3.2-ms Voltage Servo Soft-Start
  • Low-Side RDS(on) Current Sensing Scheme
  • Built-In Output Discharge Function
  • Separate Enable Input for Switchers
  • Dedicated OC Setting Terminals
  • Power Good Indicator
  • OVP, UVP, and OCP Protection
  • Non-Latch UVLO and OTP Protection
  • 20-Pin, 3-mm × 3-mm, WQFN (RUK) Package

2 Applications

  • Notebook Computers
  • Tablet Computers
  • Desktop Computers

3 Description

The TPS51275B-1 device is a cost-effective, dual-synchronous buck controller targeted for notebook system-power supply solutions. The device has 5-V and 3.3-V low-dropout regulators (LDOs) and requires few external components. The 260-kHz VCLK output can be used to drive an external charge pump, generating gate drive voltage for the load switches without reducing the main converter efficiency. The TPS51275B-1 device supports high efficiency, fast transient response and provides a combined power-good signal. Adaptive on-time, D-CAP control provides convenient and efficient operation. The device operates with a supply input voltage ranging from 5 to 24 V and supports output voltages of 5 V and 3.3 V. The TPS51275B-1 device is available in a 20-pin, 3-mm × 3-mm, WQFN package and is specified from –40°C to 85°C.

Device Information(1)

PART NUMBER SKIP MODE ALWAYS ON-LDO
TPS51275B-1 OOA VREG3 and VREG5
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Typical Application Diagram

TPS51275B-1 alt_slvsct3.gif