JAJSEL3D November 2014 – February 2018 AMC7836
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
AVSSD | AVSSC | AVSSB | AVSSA | ADC_IDLE | Reserved | GALR | DAVF |
— | — | — | — | R-1 | R-1 | R-0 | R-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | AVSSD | — |
This bit is the auto-range detection output for DAC group D. This bit is set to 1 when AVSSD< AVSSTH (–10- to 0-V output range), and 0 when AVSSD> AVSSTH (0- to 5-V output range). |
|
6 | AVSSC | — |
This bit is the auto-range detection output for DAC group C. This bit is set to 1 when AVSSC< AVSSTH (–10- to 0-V output range), and 0 when AVSSC> AVSSTH (0- to 5-V output range). |
|
5 | AVSSB | — |
This bit is the auto-range detection output for DAC group B. This bit is set to 1 when AVSSB< AVSSTH (–10- to 0-V output range), and 0 when AVSSB> AVSSTH (0- to 5-V output range). |
|
4 | AVSSA | — |
This bit is the auto-range detection output for DAC group A. This bit is set to 1 when AVEE< AVSSTH (–10- to 0-V output range), and 0 when AVEE> AVSSTH (0- to 5-V output range). |
|
3 | ADC_IDLE | R | 1 |
ADC Idle indicator.
Auto mode: 1 by default; goes to 0 once the ADC is triggered and is running. Remains 0 until ADC is stopped, then ADC_IDLE returns to 1. Direct mode: 1 by default; goes to 0 once the ADC is triggered and direct conversions are running and returns to 1 when direct mode conversions are completed. |
2 | Reserved | R | 1 |
Reserved for factory use |
1 | GALR | R | 0 |
Global alarm bit. This bit is the OR function or all individual alarm bits of the status register. This bit is set to 1 when any alarm condition occurs and remains set until the status register is read. This bit is cleared after reading the Status Register. |
0 | DAVF | R | 0 |
ADC Data available flag bit. Direct mode only. Always cleared in Auto mode.
0: ADC conversion is in progress or ADC is in Auto mode 1: ADC conversions are complete and new data is available |