SLUS920A July   2009  – July 2015

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Battery Voltage Regulation
      2. 8.3.2  Battery Current Regulation
      3. 8.3.3  Input Adapter Current Regulation
      4. 8.3.4  Adapter Detect and Power Up
      5. 8.3.5  Enable and Disable Charging
      6. 8.3.6  System Power Selector
      7. 8.3.7  Battery Learn Cycles
      8. 8.3.8  Automatic Internal Soft-Start Charger Current
      9. 8.3.9  Converter Operation
      10. 8.3.10 Synchronous and Non-Synchronous Operation
      11. 8.3.11 High Accuracy IADAPT Using Current Sense Amplifier (CSA)
      12. 8.3.12 Input Overvoltage Protection (ACOV)
      13. 8.3.13 Input Undervoltage Lockout (UVLO)
      14. 8.3.14 AC Lowvoltage (ACLOWV)
      15. 8.3.15 Battery Overvoltage Protection
      16. 8.3.16 Battery Shorted (Battery Undervoltage) Protection
      17. 8.3.17 Charge Overcurrent Protection
      18. 8.3.18 Thermal Shutdown Protection
      19. 8.3.19 Adapter Detected Status Register (ACGOOD Pin)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Input Overpower Protection (ACOP)
        1. 8.4.1.1 Conditions For ACOP Latch Off
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitance Calculation
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 Power MOSFET Selection
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The bq24753A battery charger is ideal for a host control high current charging (up to 10 A) and can charge battery packs consisting of single cells or multiple cells in series.

9.2 Typical Application

bq24753A sys_sch1_lus920.gif
(1) Pull-up rail could be either VREF or other system rail.
(2) SRSET/ACSET could come from either DAC or resistor dividers.
VIN = 20 V, VBAT = 3-cell Li-Ion, Icharge = 3 A, Iadapter_limit = 3.5 A
Figure 37. Typical System Schematic, Voltage and Current Programmed by DAC

Table 3. Component List For Typical System Circuit of Figure 37

PART DESIGNATOR QTY DESCRIPTION
Q1, Q2, Q3 3 P-channel MOSFET, –30 V, –6 A, SO-8, Vishay-Siliconix, Si4435
Q4, Q5 2 N-channel MOSFET, 30 V, 12.5 A, SO-8, Fairchild, FDS6680A
D1 1 Diode, Dual Schottky, 30 V, 200 mA, SOT23, Fairchild, BAT54C
RAC, RSR 2 Sense Resistor, 10 mΩ, 1%, 1 W, 2010, Vishay-Dale, WSL2010R0100F
L1 1 Inductor, 8.2 μH, 8.5 A, 24.8 mΩ, Vishay-Dale, IHLP5050CE-01
C1 1 Capacitor, Ceramic, 2.2 μF, 25 V, 20%, X5R, 1206, Panasonic, ECJ-3YB1E225M
C6, C7, C11, C12 4 Capacitor, Ceramic, 10 μF, 35 V, 20%, X5R, 1206, Panasonic, ECJ-3YB1E106M
C4, C10 2 Capacitor, Ceramic, 1 μF, 25 V, 10%, X7R, 2012, TDK, C2012X7R1E105K
C2, C3, C8, C9, C13, C14, C15 7 Capacitor, Ceramic, 0.1 μF, 50 V, 10%, X7R, 0805, Kemet, C0805C104K5RACTU
C5 1 Capacitor, Ceramic, 100 pF, 25 V, 10%, X7R, 0805, Kemet
C16 1 Capacitor, Ceramic, 0.47 μF, 25 V, 10%, X7R, 0805, Kemet
R1 1 Resistor, Chip, 432 kΩ, 1/16 W, 1%, 0402
R2 1 Resistor, Chip, 66.5 kΩ, 1/16 W, 1%, 0402
R3 1 Resistor, Chip, 422 kΩ, 1/16 W, 1%, 0402
R4 1 Resistor, Chip, 71 kΩ, 1/16 W, 5%, 0402
R10 1 Resistor, Chip, 2 Ω, 1 W, 5%, 2010
RPVCC 1 Resistor, Chip, 10 Ω, 1/4 W, 5%, 2016

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 4 as the input parameters.

Table 4. Design Parameters

PARAMETER EXAMPLE VALUE
AC adapter voltage (VIN) 19 V
AC adapter current limit 4 A
Battery charge voltage (number of cells in series) 12.6 V (3 cells)
Battery charge current (during constant current phase) 3 A

9.2.2 Detailed Design Procedure

9.2.2.1 Input Capacitance Calculation

During the adapter hot plug-in, the ACDRV has not been enabled. The AC switch is off and the simplified equivalent circuit of the input is shown in Figure 38.

bq24753A equiv_circuit_lus735.gifFigure 38. Simplified Equivalent Circuit During Adapter Insertion

The voltage on the charger input side VIN is given by:

Equation 6. bq24753A qnew_vin_lus835.gif

in which,

bq24753A q_rt_lus835.gif
Equation 7. bq24753A q_vci_lus835.gif

The damping conditions is:

Equation 8. bq24753A qnew3_ri_lus835.gif

Figure 39 (a) demonstrates a higher Ci helps dampen the voltage spike. Figure 39 (b) demonstrates the effect of the input stray inductance Li upon the input voltage spike. Figure 39 (c) shows how increased resistance helps to suppress the input voltage spike.

bq24753A paramet_ipv_lus885.gifFigure 39. Parametric Study of the Input Voltage

As shown in Figure 39, minimizing the input stray inductance, increasing the input capacitance, and adding resistance (including using higher ESR capacitors) helps suppress the input voltage spike. However, a user often cannot control input stray inductance and increasing capacitance can increase costs. Therefore, the most efficient and cost-effective approach is to add an external resistor.

Figure 40 depicts the recommended input filter design. The measured input voltage and current waveforms are shown in Figure 41. The input voltage spike has been well damped by adding a 2-Ω resistor, while keeping the capacitance low.

bq24753A ip_flt_lus920.gifFigure 40. Recommended Input Filter Design

9.2.2.2 Inductor Selection

The bq24753A has three selectable fixed switching frequency. Higher switching frequency allows the use of smaller inductor and capacitor values. Inductor saturation current should be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 9. bq24753A eq4_lusa79.gif

The inductor ripple current depends on input voltage (VIN), duty cycle (D = VOUT/VIN), switching frequency (fS), and inductance (L):

Equation 10. bq24753A eq5_lusa79.gif

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. For example, the battery charging voltage range is from 9 V to 12.6 V for 3-cell battery pack. For 20-V adapter voltage, 10-V battery voltage gives the maximum inductor ripple current. Another example is 4-cell battery, the battery voltage range is from 12 V to 16.8 V, and 12-V battery voltage gives the maximum inductor ripple current.

Usually inductor ripple is designed in the range of (20 – 40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.

The bq24753A has charge under current protection (UCP) by monitoring charging current sensing resistor cycle-by-cycle. The typical cycle-by-cycle UCP threshold is 5-mV falling edge corresponding to 0.5-A falling edge for a 10-mΩ charging current sensing resistor. When the average charging current is less than 125 mA for a 10-mΩ charging current sensing resistor, the low side MOSFET is off until BTST capacitor voltage needs to refresh the charge. As a result, the converter relies on low side MOSFET body diode for the inductor freewheeling current.

9.2.2.3 Input Capacitor

Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current occurs where the duty cycle is closest to 50% and can be estimated by Equation 11:

Equation 11. bq24753A eq6_lusa79.gif

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. 25-V rating or higher capacitor is preferred for 19 – 20-V input voltage. 10 – 20-μF capacitance is suggested for typical of 3 – 4-A charging current.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high input voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

9.2.2.4 Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current is given by:

Equation 12. bq24753A eq7_lusa79.gif

The bq24753A has internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed between 10 kHz and 20 kHz. The preferred ceramic capacitor is 25-V X7R or X5R for output capacitor. 10 – 20-μF capacitance is suggested for a typical of 3 – 4-A charging current. Place the capacitors after charging current sensing resistor to get the best charge current regulation accuracy.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

9.2.2.5 Power MOSFET Selection

Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30 V or higher voltage rating MOSFETs are preferred for 19 – 20-V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance, RDS(ON), and the gate-to-drain charge, QGD. For the bottom side MOSFET, FOM is defined as the product of the MOSFET's on-resistance, RDS(ON), and the total gate charge, QG.

Equation 13. FOMtop = RDS(on) x QGD; FOMbottom = RDS(on) x QG

The lower the FOM value, the lower the total power loss. Usually lower RDS(ON) has higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D = VOUT/VIN), charging current (ICHG), MOSFET's on-resistance (RDS(ON)), input voltage (VIN), switching frequency (fS), turn on time (ton), and turn off time (toff):

Equation 14. bq24753A eq9_lusa79.gif

The first item represents the conduction loss. Usually MOSFET RDS(ON) increases by 50% with 100°C junction temperature rise. The second term represents the switching loss. The MOSFET turn-on and turn-off times are given by:

Equation 15. bq24753A eq10_lusa79.gif

Where Qsw is the switching charge, Ion is the turn-on gate driving current, and Ioff is the turn-off gate driving current. If the switching charge is not given in the MOSFET data sheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):

Equation 16. bq24753A eq11_lusa79.gif

Gate driving current can be estimated by the REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turn-on gate resistance (Ron), and turn-off gate resistance (Roff) of the gate driver:

Equation 17. bq24753A eq12_lusa79.gif

The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous continuous conduction mode:

Equation 18. Pbottom = (1 - D) x ICHG2 x RDS(on)

When the charger operates in non-synchronous mode, the bottom-side MOSFET is off. As a result, all of the freewheeling current goes through the body-diode of the bottom-side MOSFET. The body diode power loss depends on its forward voltage drop (VF), non-synchronous mode charging current (INONSYNC), and duty cycle (D):

Equation 19. PD = VF x INONSYNC x (1 - D)

The maximum charging current in non-synchronous mode can be up to 0.25 A for a 10-mΩ charging current sensing resistor or 0.5 A if battery voltage is below 2.5 V. The minimum duty cycle happens at lowest battery voltage. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum non-synchronous mode charging current.

9.2.3 Application Curve

bq24753A adaptdc_lus885.gifFigure 41. Adapter DC Side Hot Plug-in Test Waveforms