DLPS033C November   2014  – March 2017 DLP9500UV

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1. 3.1 Simplified Schematic
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Storage Conditions
    3. 7.3  ESD Ratings
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Electrical Characteristics
    7. 7.7  LVDS Timing Requirements
    8. 7.8  LVDS Waveform Requirements
    9. 7.9  Serial Control Bus Timing Requirements
    10. 7.10 Systems Mounting Interface Loads
    11. 7.11 Micromirror Array Physical Characteristics
    12. 7.12 Micromirror Array Optical Characteristics
    13. 7.13 Chipset Component Usage Specification
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DLPC410 - Digital Controller for DLP Discovery 4100 Chipset
      2. 8.3.2 DLPA200 - DMD Micromirror Drivers
      3. 8.3.3 DLPR410 - PROM for DLP Discovery 4100 Chipset
      4. 8.3.4 DLP9500 - DLP 0.95 1080p 2xLVDS UV Type-A DMD 1080p DMD
        1. 8.3.4.1 DLP9500UV 1080p Chipset Interfaces
          1. 8.3.4.1.1 DLPC410 Interface Description
            1. 8.3.4.1.1.1 DLPC410 IO
            2. 8.3.4.1.1.2 Initialization
            3. 8.3.4.1.1.3 DMD Device Detection
            4. 8.3.4.1.1.4 Power Down
          2. 8.3.4.1.2 DLPC410 to DMD Interface
            1. 8.3.4.1.2.1 DLPC410 to DMD IO Description
            2. 8.3.4.1.2.2 Data Flow
          3. 8.3.4.1.3 DLPC410 to DLPA200 Interface
            1. 8.3.4.1.3.1 DLPA200 Operation
            2. 8.3.4.1.3.2 DLPC410 to DLPA200 IO Description
          4. 8.3.4.1.4 DLPA200 to DLP9500UV Interface
            1. 8.3.4.1.4.1 DLPA200 to DLP9500UV Interface Overview
      5. 8.3.5 Measurement Conditions
    4. 8.4 Device Functional Modes
      1. 8.4.1 Single Block Mode
      2. 8.4.2 Dual Block Mode
      3. 8.4.3 Quad Block Mode
      4. 8.4.4 Global Block Mode
    5. 8.5 Window Characteristics and Optics
      1. 8.5.1 Optical Interface and System Image Quality
      2. 8.5.2 Numerical Aperture and Stray Light Control
      3. 8.5.3 Pupil Match
      4. 8.5.4 Illumination Overfill
    6. 8.6 Micromirror Array Temperature Calculation
      1. 8.6.1 Package Thermal Resistance
      2. 8.6.2 Case Temperature
      3. 8.6.3 Micromirror Array Temperature Calculation
    7. 8.7 Micromirror Landed-On and Landed-Off Duty Cycle
      1. 8.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 8.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 8.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 8.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 DMD Reflectivity Characteristics
        1. 9.1.1.1 Design Considerations Influencing DMD Reflectivity
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Device Description
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power-Up Sequence (Handled by the DLPC410)
    2. 10.2 DMD Power-Up and Power-Down Procedures
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Impedance Requirements
      2. 11.1.2 PCB Signal Routing
      3. 11.1.3 Fiducials
      4. 11.1.4 PCB Layout Guidelines
        1. 11.1.4.1 DMD Interface
          1. 11.1.4.1.1 Trace Length Matching
        2. 11.1.4.2 DLP9500UV Decoupling
          1. 11.1.4.2.1 Decoupling Capacitors
        3. 11.1.4.3 VCC and VCC2
        4. 11.1.4.4 DMD Layout
        5. 11.1.4.5 DLPA200
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
      2. 12.1.2 Device Marking
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Features

  • 0.95-Inch Diagonal Micromirror Array
    • 1920 × 1080 Array of Aluminum, Micrometer-Sized Mirrors (1080p Resolution)
    • 10.8-µm Micromirror Pitch
    • ±12° Micromirror Tilt Angle (Relative to Flat State)
    • Designed for Corner Illumination
  • Designed for Use with UV Light
    (363 to 420 nm):
    • Window Transmission 98% (Single Pass, Through Two Window Surfaces) (Nominal)
    • Micromirror Reflectivity 88% (Nominal)
    • Array Diffraction Efficiency 85% (Nominal)
    • Array Fill Factor 92% (Nominal)
  • Four 16-Bit, Low-Voltage Differential Signaling (LVDS), Double Data Rate (DDR) Input Data Buses
  • Up to 400-MHz Input Data Clock Rate
  • 42.2-mm × 42.2-mm × 7-mm Package Footprint
  • Hermetic Package

Applications

  • Industrial:
    • Direct Imaging Lithography
    • Laser Marking and Repair Systems
    • Computer to Plate Printers
    • Rapid Prototype Machines
    • 3D Printers
  • Medical:
    • Opthalmology
    • Photo Therapy
    • Hyper-Spectral Imaging

Description

DLP9500UV is a digitally controlled micro-electromechanical system (MEMS) spatial light modulator (SLM). When coupled to an appropriate optical system, the DLP9500UV can be used to modulate the amplitude, direction, and/or phase of incoming light.

The DLP95000UV chipset is a new digital micromirror device (DMD) addition to the DLP® Discovery™ 4100 platform, which enables high resolution and high performance spatial light modulation beyond the visible spectrum into the UVA spectrum (363 nm to 420 nm). The DLP9500UV DMD is designed with a special window that is optimized for UV transmission.

The DLP9500UV is the 0.95 1080p DMD, with a hermetic package, that is sold with a dedicated DLPC410 controller required for high speed pattern rates of >23000 Hz (1-bit binary) and >1700 Hz (8-bit gray), one unit DLPR410 (DLP Discovery 4100 Configuration PROM), and two units DLPA200 (DMD micromirror drivers). Refer to DLPC410, DLPA200, DLPR410, and DLP9500UV Functional Block Diagram.

Reliable function and operation of the DLP9500UV requires that it be used in conjunction with the other components of the chipset. A dedicated chipset provides developers easier access to the DMD as well as high speed, independent micromirror control.

DLP9500UV is a digitally controlled micro-electromechanical system (MEMS) spatial light modulator (SLM). When coupled to an appropriate optical system, the DLP9500UV can be used to modulate the amplitude, direction, and/or phase of incoming light.

Device Information (1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DLP9500UV LCCC (355) 42.16 mm × 42.16 mm x 7.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

DLP9500UV key_graph_update.gif