JAJSAO5I January   2007  – December 2017 LM5022

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Voltage Start-Up Regulator
      2. 7.3.2 Input Undervoltage Detector
      3. 7.3.3 Error Amplifier
      4. 7.3.4 Current Sensing and Current Limiting
      5. 7.3.5 PWM Comparator and Slope Compensation
      6. 7.3.6 Soft Start
      7. 7.3.7 MOSFET Gate Driver
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Oscillator, Shutdown, and SYNC
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  MOSFET
        3. 8.2.2.3  Output Diode
        4. 8.2.2.4  Boost Inductor
        5. 8.2.2.5  Output Capacitor
        6. 8.2.2.6  VCC Decoupling Capacitor
        7. 8.2.2.7  Input Capacitor
        8. 8.2.2.8  Current Sense Filter
        9. 8.2.2.9  RSNS, RS2 and Current Limit
        10. 8.2.2.10 Control Loop Compensation
        11. 8.2.2.11 Efficiency Calculations
          1. 8.2.2.11.1 Chip Operating Loss
          2. 8.2.2.11.2 MOSFET Switching Loss
          3. 8.2.2.11.3 MOSFET and RSNS Conduction Loss
          4. 8.2.2.11.4 Output Diode Loss
          5. 8.2.2.11.5 Input Capacitor Loss
          6. 8.2.2.11.6 Output Capacitor Loss
          7. 8.2.2.11.7 Boost Inductor Loss
          8. 8.2.2.11.8 Total Loss
          9. 8.2.2.11.9 Efficiency
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Filter Capacitors
      2. 10.1.2 Sense Lines
      3. 10.1.3 Compact Layout
      4. 10.1.4 Ground Plane and Shape Routing
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 設計サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.3 Error Amplifier

An internal high gain error amplifier is provided within the LM5022. The amplifier’s noninverting input is internally set to a fixed reference voltage of 1.25 V. The inverting input is connected to the FB pin. In non-isolated applications such as the boost converter the output voltage, VO, is connected to the FB pin through a resistor divider. The control loop compensation components are connected between the COMP and FB pins. For most isolated applications, the error amplifier function is implemented on the secondary side of the converter and the internal error amplifier is not used. The internal error amplifier is configured as an open-drain output and can be disabled by connecting the FB pin to ground. An internal 5-kΩ pullup resistor between a 5-V reference and COMP can be used as the pullup for an opto-coupler in isolated applications.