JAJSCV6B December   2016  – June 2017 LM5166

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Integrated Power MOSFETs
      2. 7.3.2  Selectable PFM or COT Mode Converter Operation
        1. 7.3.2.1 PFM Mode Operation
        2. 7.3.2.2 COT Mode Operation
          1. 7.3.2.2.1 Ripple Generation Methods
          2. 7.3.2.2.2 COT Mode Light-Load Operation
      3. 7.3.3  Low Dropout Operation and 100% Duty Cycle Mode
      4. 7.3.4  Adjustable Output Voltage (FB)
      5. 7.3.5  Adjustable Current Limit
      6. 7.3.6  Precision Enable (EN) and Hysteresis (HYS)
      7. 7.3.7  Power Good (PGOOD)
      8. 7.3.8  Configurable Soft Start (SS)
      9. 7.3.9  Short-Circuit Operation
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode - COT
      4. 7.4.4 Sleep Mode - COT
      5. 7.4.5 Active Mode - PFM
      6. 7.4.6 Sleep Mode - PFM
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Wide VIN, Low IQ, High-Efficiency COT Converter Rated at 5 V, 500 mA
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Feedback Resistors - RFB1, RFB2
          3. 8.2.1.2.3 Switching Frequency - RT
          4. 8.2.1.2.4 Filter Inductance - LF
          5. 8.2.1.2.5 Output Capacitors - COUT
          6. 8.2.1.2.6 Ripple Generation Network - RESR, CFF
          7. 8.2.1.2.7 Input Capacitor - CIN
          8. 8.2.1.2.8 Soft-Start Capacitor - CSS
          9. 8.2.1.2.9 Application Curves
      2. 8.2.2 Design 2: Wide VIN, Low IQ COT Converter Rated at 3.3 V, 500 mA
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Feedback Resistors - RFB1, RFB2
          2. 8.2.2.2.2 Switching Frequency - RT
          3. 8.2.2.2.3 Filter Inductance - LF
          4. 8.2.2.2.4 Output Capacitors - COUT
          5. 8.2.2.2.5 Ripple Generation Network - RESR
          6. 8.2.2.2.6 Input Capacitor - CIN
          7. 8.2.2.2.7 Soft-Start Capacitor - CSS
          8. 8.2.2.2.8 Application Curves
      3. 8.2.3 Design 3: High-Density PFM Converter Rated at 3.3 V, 0.3 A
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Peak Current Limit Setting - RILIM
          2. 8.2.3.2.2 Switching Frequency - LF
          3. 8.2.3.2.3 Output Capacitors - COUT
          4. 8.2.3.2.4 Input Capacitor - CIN
          5. 8.2.3.2.5 Application Curves
      4. 8.2.4 Design 4: Wide VIN, Low IQ PFM Converter Rated at 5 V, 500 mA
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 Feedback Resistors - RFB1, RFB2
          2. 8.2.4.2.2 Peak Current Limit Setting - RILIM
          3. 8.2.4.2.3 Switching Frequency - LF
          4. 8.2.4.2.4 Output Capacitors - COUT
          5. 8.2.4.2.5 Input Capacitor - CIN
        3. 8.2.4.3 Application Curves
      5. 8.2.5 Design 5: 12-V, 300-mA COT Converter Operating From 24-V or 48-V Input
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
          1. 8.2.5.2.1 Peak Current Limit Setting - RILIM
          2. 8.2.5.2.2 Switching Frequency - RRT
          3. 8.2.5.2.3 Inductor - LF
          4. 8.2.5.2.4 Input and Output Capacitors - CIN, COUT
          5. 8.2.5.2.5 Feedback Resistors - RFB1, RFB2
          6. 8.2.5.2.6 Ripple Generation Network - RA, CA, CB
          7. 8.2.5.2.7 Undervoltage Lockout Setpoint - RUV1, RUV2, RHYS
          8. 8.2.5.2.8 Soft Start - CSS
        3. 8.2.5.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact PCB Layout for EMI Reduction
      2. 10.1.2 Feedback Resistors
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
      3. 11.1.3 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Specifications

Absolute Maximum Ratings

Over the recommended operating junction temperature range of –40°C to 150°C (unless otherwise noted).(1)(2)
MIN MAX UNIT
VIN, EN to GND –0.3 68 V
SW to GND –0.7 VVIN + 0.3 V
20-ns transient –3
PGOOD, VOUT(3) to GND –0.3 16 V
HYS to GND –0.3 7 V
ILIM, SS, RT, FB(4) to GND –0.3 3.6 V
Maximum junction temperature, TJ –40 150 °C
Storage temperature, Tstg –55 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
Fixed output setting.
Adjustable output setting.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

Over the recommended operating junction temperature range of –40°C to 150°C (unless otherwise noted).(1)
MIN NOM MAX UNIT
Input voltages VIN 3 65 V
EN –0.3 65
PGOOD –0.3 12
HYS –0.3 5.5
Output current IOUT 0 500 mA
Temperature Operating junction temperature –40 150 °C
Operating Ratings are conditions under which the device is intended to be functional. For specifications and test conditions, see Electrical Characteristics.

Thermal Information

THERMAL METRIC(1) LM5166 UNIT
DRC (VSON)
10 PINS
RθJA Junction-to-ambient thermal resistance 49.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 57.2 °C/W
RθJB Junction-to-board thermal resistance 26.6 °C/W
ψJT Junction-to-top characterization parameter 0.8 °C/W
ψJB Junction-to-board characterization parameter 23.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 4.8 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Electrical Characteristics

Typical values correspond to TJ = 25°C. Minimum and maximum limits are based on TJ = –40°C to +125°C. VIN = 12 V (unless otherwise noted).(1)(2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IQ-SD VIN DC supply current, shutdown VEN = 0 V, TJ = 25°C 4 6 µA
IQ-SLEEP VIN DC supply current, no load VFB = 1.5 V, TJ = 25°C 9.7 15 µA
IQ-SLEEP-VINMAX VIN DC supply current, no load VFB = 1.5 V, VVIN = 65 V, TJ = 25°C 10 15 µA
IQ-ACTIVE-PFM VIN DC supply current, active PFM mode, RRT = 0 Ω, RSS = 100 kΩ 205 µA
IQ-ACTIVE-COT VIN DC supply current, active COT mode, RRT = RSS = 100 kΩ 320 µA
POWER SWITCHES
RDSON1 High-side MOSFET RDS(on) ISW = –100 mA 0.93 Ω
RDSON2 Low-side MOSFET RDS(on) ISW = 100 mA 0.48 Ω
CURRENT LIMITING
IHS_LIM1 High-side peak current limit threshold See Table 3 1125 1250 1375 mA
IHS_LIM2 675 750 825
IHS_LIM3 440 500 560
ILS_LIM1 Low-side valley current limit threshold See Table 3 415 mA
ILS_LIM2 315
REGULATION COMPARATOR
VVOUT5 VOUT 5-V DC setpoint LM5166X 4.9 5.0 5.1 V
VVOUT3.3 VOUT 3.3-V DC setpoint LM5166Y 3.23 3.3 3.37 V
IVOUT VOUT pin input current VVOUT = 5 V, LM5166X 7 µA
VVOUT = 3.3 V, LM5166Y 3.8
VFB1 Lower FB regulation threshold
(PFM and COT)
Adjustable VOUT version 1.208 1.223 1.238 V
VFB2 Upper FB regulation threshold (PFM) 1.218 1.233 1.248 V
IFB FB pin input bias current VFB = 1 V 25 nA
FBHYS-PFM FB comparator PFM hysteresis PFM mode 10 mV
FBHYS-COT FB comparator dropout hysteresis COT mode 4 mV
FBLINE-REG FB threshold variation over line VVIN = 3 V to 65 V 0.005 %/V
VOUTLINE-REG VOUT threshold variation over line LM5166X, VVIN = 6 V to 65 V
LM5166Y, VVIN = 4.5 V to 65 V
0.005 %/V
POWER GOOD
UVTRISING PGOOD comparator VFB rising relative to VFB1 threshold 94%
UVTFALLING VFB falling relative to VFB1 threshold 87%
RPGOOD PGOOD on-resistance VFB = 1 V 80 200 Ω
VINMIN-PGOOD Minimum required VIN for valid PGOOD VVIN falling
IPGOOD = 0.1 mA, VPGOOD < 0.5 V
1.2 1.65 V
IPGOOD PGOOD off-state leakage VFB = 1.2 V, VPGOOD = 5.5 V 10 100 nA
ENABLE / UVLO
VIN-ON Turnon threshold VVIN rising 2.60 2.75 2.95 V
VIN-OFF Turnoff threshold VVIN falling 2.35 2.45 2.60 V
VEN-ON EN turnon threshold VEN rising 1.163 1.22 1.276 V
VEN-OFF EN turnoff threshold VEN falling 1.109 1.144 1.178 V
VEN-HYS EN hysteresis 76 mV
VEN-SD EN shutdown threshold VEN falling 0.3 0.6 V
RHYS HYS on-resistance VEN = 1 V 80 200 Ω
IHYS HYS off-state leakage VEN = 1.5 V, VHYS = 5.5 V 10 100 nA
SOFT-START
ISS Soft-start charging current VSS = 1 V 10 µA
TSS-INT Soft-start rise time SS floating 900 µs
THERMAL SHUTDOWN
TJ-SD Thermal shutdown threshold 170 °C
TJ-SD-HYS Thermal shutdown hysteresis 10 °C

Switching Characteristics

Over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TON-MIN Minimum on-time 180 ns
TON1 On-time 16 kΩ from RT to GND 280 ns
TON2 On-time 75 kΩ from RT to GND 1150 ns
All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) as follows: TJ = TA + (PD • θJA) where θJA (in °C/W) is the package thermal impedance provided in Thermal Information.

Typical Characteristics

Unless otherwise specified, VIN = 12 V, VOUT = 5 V. Please refer to Typical Applications for circuit designs.
LM5166 D003_SNVSA67.gif
See schematic,
Figure 52
LF = 150 µH
COUT = 47 µF
FSW(nom) = 100 kHz
RRT = 309 kΩ
Figure 1. Converter Efficiency: 5 V, 500 mA, COT
LM5166 D007_SNVSA67.gif
See schematic,
Figure 70
LF = 4.7 µH
COUT = 47 µF
FSW(nom) = 600 kHz
RRT = 0 Ω
Figure 3. Converter Efficiency: 3.3 V, 300 mA, PFM
LM5166 D001_SNVSAO1.gif
Figure 5. Internal VIN UVLO Voltage vs Temperature
LM5166 D003_SNVSAO1.gif
Figure 7. VIN Sleep and Shutdown Supply Current vs Temperature
LM5166 D005_SNVSAO1.gif
RRT = 100 kΩ
Figure 9. VIN Active Mode Supply Current vs Temperature
LM5166 D007_SNVSAO1.gif
VVIN = 65 V
Figure 11. SW Pin Leakage Current vs Temperature
LM5166 D027_snvsa67.gif
LM5166Y
Figure 13. VOUT Regulation Thresholds vs Temperature
LM5166 D011_SNVSAO1.gif
Figure 15. PGOOD Thresholds vs Temperature
LM5166 D014_SNVSAO1.gif
Figure 17. Soft-Start to Feedback Clamp Offset vs Temperature
LM5166 D016_SNVSAO1.gif
Figure 19. High-Side MOSFET On-State Resistance vs Temperature
LM5166 D018_SNVSAO1.gif
Figure 21. Low-Side MOSFET On-State Resistance vs Temperature
LM5166 D020_SNVSAO1.gif
Figure 23. High-Side Peak Current Limit vs Temperature
LM5166 D022_SNVSAO1.gif
Figure 25. Low-Side Valley Current Limit vs Temperature
LM5166 D024_SNVSAO1.gif
Figure 27. Zero-Cross Current Threshold vs Temperature
LM5166 ds_cot_5V_ss_12V_0mA.png
Time Scale: 20 ms/Div
CH1: VSW, 5 V/Div
CH2: VOUT, 50 mV/Div
CH4: IL, 200 mA/Div
Figure 29. No-Load Switching Waveforms, COT, Type 2
LM5166 ds_cot_5V_startup_12V_500mA.png
Time Scale: 2 ms/Div
CH1: VIN, 2 V/Div
CH2: VOUT, 1 V/Div
CH4: IL, 200 mA/Div
Figure 31. Full-Load Start-Up, COT, Type 2
LM5166 ds_pfm_3V3_ss_12V_0mA.png
Time Scale: 20 ms/Div
CH1: VSW, 5 V/Div
CH2: VOUT, 50 mV/Div
CH4: IL, 400 mA/Div
Figure 33. No-Load Switching Waveforms
PFM Mode, ILIM = 750 mA
LM5166 ds_pfm_3V3_startup_12V_300mA.png
Time Scale: 2 ms/Div
CH1: VIN, 2 V/Div
CH2: VOUT, 1 V/Div
CH4: IL, 400 mA/Div
Figure 35. Full-Load Start-Up, PFM, ILIM = 750 mA
LM5166 ds_pfm_5V_ss_12V_0mA.png
Time Scale: 50 ms/Div
CH1: VSW, 5 V/Div
CH2: VOUT, 50 mV/Div
CH4: IL, 400 mA/Div
Figure 37. No-Load Switching Waveforms
PFM Mode, ILIM = 1.25 A, Modulated
LM5166 D001_SNVSA67.gif
See schematic,
Figure 63
LF = 47 µH
COUT = 47 µF
FSW(nom) = 200 kHz
RRT = 100 kΩ
Figure 2. Converter Efficiency: 3.3 V, 500 mA, COT
LM5166 D005_SNVSA67.gif
See schematic,
Figure 77
LF = 22 µH
COUT = 200 µF
FSW(nom) = 100 kHz
RRT = 0 Ω
Figure 4. Converter Efficiency: 5 V, 500 mA, PFM
LM5166 D002_SNVSAO1.gif
Figure 6. Enable Threshold Voltage vs Temperature
LM5166 D004_SNVSAO1.gif
Figure 8. VIN Sleep and Shutdown Supply Current vs Input Voltage
LM5166 D006_SNVSAO1.gif
RRT = 100 kΩ
Figure 10. VIN Active Mode Supply Current vs Input Voltage
LM5166 D008_SNVSAO1.gif
Figure 12. Feedback Comparator Threshold Voltage vs Temperature
LM5166 D028_snvsa67.gif
LM5166X
Figure 14. VOUT Regulation Thresholds vs Temperature
LM5166 D012_SNVSAO1.gif
Figure 16. Feedback Voltage vs Soft-Start Voltage
LM5166 D015_SNVSAO1.gif
Figure 18. COT One-Shot Timer TON vs Input Voltage
LM5166 D017_SNVSAO1.gif
Figure 20. High-Side MOSFET On-State Resistance vs Input Voltage
LM5166 D019_SNVSAO1.gif
Figure 22. Low-Side MOSFET On-State Resistance vs Input Voltage
LM5166 D021_SNVSAO1.gif
Figure 24. High-Side Peak Current Limit vs Input Voltage
LM5166 D023_SNVSAO1.gif
Figure 26. Low-Side Valley Current Limit vs Input Voltage
LM5166 D025_SNVSAO1.gif
Figure 28. PGOOD and HYS Pulldown RDS(on) vs Temperature
LM5166 ds_cot_5V_ss_12V_500mA.png
Time Scale: 10 µs/Div
CH1: VSW, 5 V/Div
CH2: VOUT, 50 mV/Div
CH4: IL, 200 mA/Div
Figure 30. Full Load Switching Waveforms, COT, Type 2
LM5166 ds_cot_5V_sc_12V.png
Time Scale: 100 µs/Div
CH1: VSW, 4 V/Div

CH4: IL, 200 mA/Div
Figure 32. Short Circuit, COT, Type 2
LM5166 ds_pfm_3V3_ss_12V_300mA.png
Time Scale: 10 µs/Div
CH1: VSW, 5 V/Div
CH2: VOUT, 100 mV/Div
CH4: IL, 400 mA/Div
Figure 34. Full-Load Switching Waveforms
PFM Mode, ILIM = 750 mA
LM5166 ds_pfm_3V3_sc_12V.png
Time Scale: 20 µs/Div
CH1: VSW, 4 V/Div

CH4: IL, 400 mA/Div
Figure 36. Short Circuit, PFM, ILIM = 750 mA
LM5166 ds_pfm_5V_ss_12V_500mA.png
Time Scale: 20 µs/Div
CH1: VSW, 5 V/Div
CH2: VOUT, 100 mV/Div
CH4: IL, 400 mA/Div
Figure 38. Full-Load Switching Waveforms
PFM Mode, ILIM = 1.25 A, Modulated