JAJS924J June   1999  – November 2016 LM61

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LM61 Transfer Function
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Temperature Sensing Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Capacitive Loads
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Other Application Circuits
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Mounting
    2. 10.2 Layout Examples
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage 12 –0.2 V
Output voltage (+VS + 0.6) –0.6 V
Output current 10 mA
Input current at any pin(2) 5 mA
Maximum junction temperature, TJ 125 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > VS), the current at that pin must be limited to 5 mA.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2500 V
Machine Model (MM)(3) ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
(3) The machine model is a 200-pF capacitor discharged directly into each pin.

6.3 Recommended Operating Conditions

MIN MAX UNIT
+VS Supply voltage 2 10 V
T Operating temperature LM61C –30 100 °C
LM61B –25 85

6.4 Thermal Information

THERMAL METRIC(1) LM61 UNIT
DBZ (SOT-23) LP (TO-92)
3 PINS 3 PINS
RθJA Junction-to-ambient thermal resistance(2) 286.3 162.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 96 85 °C/W
RθJB Junction-to-board thermal resistance 57.1 — °C/W
ψJT Junction-to-top characterization parameter 5.3 29.2 °C/W
ψJB Junction-to-board characterization parameter 55.8 141.4 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) The junction-to-ambient thermal resistance is specified without a heat sink in still air.

6.5 Electrical Characteristics

+VS = 3 V (DC)(1)(2)
PARAMETER TEST CONDITIONS MIN(3) TYP(4) MAX(3) UNIT
Accuracy(5) TA = 25°C LM61B –2 2 °C
LM61C –3 3
LM61B –3 3
LM61C –4 4
Output voltage at 0°C 600 mV
Nonlinearity(6) LM61B –0.6 0.6 °C
LM61C –0.8 0.8
Sensor gain (average slope) LM61B 9.7 10 10.3 mV/°C
LM61C 9.6 10 10.4
Output impedance +VS = 3 V to 10 V 0.8 kΩ
TA = –30°C to 85°C, +VS = 2.7 V 2.3
TA = 85°C to 100°C, +VS = 2.7 V 5
Line regulation(7) +VS = 3 V to 10 V –0.7 0.7 mV/V
+VS = 2.7 V to 3.3 V –5.7 5.7 mV
Quiescent current +VS = 2.7 V to 10 V TA = 25°C 82 125 µA
155
Change of quiescent current +VS = 2.7 V to 10 V ±5 µA
Temperature coefficient of quiescent current 0.2 µA/°C
Long term stability(8) TJ = TMAX = 100°C, for 1000 hours ±0.2 °C
(1) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(2) Typical limits represent most likely parametric norm.
(3) Maximum and minimum limits apply for TA = TJ = TMIN to TMAX.
(4) Typical limits apply for TA = TJ = 25°C.
(5) Accuracy is defined as the error between the output voltage and 10 mV/°C multiplied by the device's case temperature plus 600 mV, at specified conditions of voltage, current, and temperature (expressed in °C).
(6) Nonlinearity is defined as the deviation of the output-voltage-versus-temperature curve from the best-fit straight line, over the device's rated temperature range.
(7) Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output due to heating effects can be computed by multiplying the internal dissipation by the thermal resistance.
(8) For best long-term stability, any precision circuit gives best results if the unit is aged at a warm temperature, or temperature cycled for at least 46 hours before long-term life test begins. This is especially true when a small (Surface-Mount) part is wave-soldered; allow time for stress relaxation to occur. The majority of the drift occurs in the first 1000 hours at elevated temperatures. The drift after 1000 hours does not continue at the first 1000-hour rate.

6.6 Typical Characteristics

The LM61 in the SOT-23 package mounted to a printed-circuit board as shown in Figure 18 was used to generate the following thermal curves.
LM61 1289703.png
Figure 1. Junction-to-Ambient Thermal Resistance
LM61 1289705.png
Figure 3. Thermal Response in Still Air with Heat Sink
LM61 1289708.png
Figure 5. Thermal Response in Still Air without Heat Sink
LM61 1289710.png
Figure 7. Accuracy vs Temperature
LM61 1289712.png
Figure 9. Supply Voltage vs Supply Current
LM61 1289704.png
Figure 2. Thermal Time Constant
LM61 1289706.png
Figure 4. Thermal Response in Stirred Oil Bath
with Heat Sink
LM61 1289709.png
Figure 6. Quiescent Current vs Temperature
LM61 1289711.png
Figure 8. Noise Voltage
LM61 1289722.gif
Figure 10. Start-Up Response