JAJSDF8B March 2017 – July 2019 LMK04616
PRODUCTION DATA.
The CLKIN_CTRL0 Register provides control of CLK Input features. Back to Register Map.
BIT NO. | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:4] | RSRVD | - | - | Reserved. |
[3] | CLKIN_STAGGER_EN | RW | 1 | CLKINBLK Staggered Activation/De-Activation. When CLKIN_STAGGER_EN is 1 the input clock stages are activated and de-activated one at a time. |
[2] | CLKIN_SWRST | RWSC | 0 | CLKINBLK Software Reset. Writing a 1 to CLKIN_SWRST will reset reset the CLKIN Block. The CLKIN_SWRST is cleared automatically to 0. |
[1] | RSRVD | - | - | Reserved. |
[0] | CLKINSEL1_INV | RW | 0 | CLKIN_SEL Invert.
CLKINSEL1_INV - Polarity 0 - Non-Inverted 1 - Inverted |