JAJSDF8B March 2017 – July 2019 LMK04616
PRODUCTION DATA.
It is best to consider proximity of each clock output to each other and other PLL circuitry when choosing final clock output locations. Here are some guidelines to help achieve best performance when assigning outputs to specific CLKout/OSCout pins.
Other device specific configuration. For LMK04616, consider the following:
LMK04616 provides the option to have two clock inputs. The clock priority, clock loss detection, holdover, and loss recovery can be programmed. See Holdover for more details.
To generate JESD204B compliant clocks, see JEDEC JESD204B for more details.