JAJSG45F June   2010  – September 2018 MSP430F5630 , MSP430F5631 , MSP430F5632 , MSP430F5633 , MSP430F5634 , MSP430F5635 , MSP430F5636 , MSP430F5637 , MSP430F5638

PRODUCTION DATA.  

  1. 1デバイスの概要
    1. 1.1 特長
    2. 1.2 アプリケーション
    3. 1.3 概要
    4. 1.4 機能ブロック図
  2. 2改訂履歴
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-1 Signal Descriptions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 5.6  Thermal Resistance Characteristics
    7. 5.7  Schmitt-Trigger Inputs – General-Purpose I/O
    8. 5.8  Inputs – Ports P1, P2, P3, and P4
    9. 5.9  Leakage Current – General-Purpose I/O
    10. 5.10 Outputs – General-Purpose I/O (Full Drive Strength)
    11. 5.11 Outputs – General-Purpose I/O (Reduced Drive Strength)
    12. 5.12 Output Frequency – Ports P1, P2, and P3
    13. 5.13 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    14. 5.14 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    15. 5.15 Crystal Oscillator, XT1, Low-Frequency Mode
    16. 5.16 Crystal Oscillator, XT2
    17. 5.17 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    18. 5.18 Internal Reference, Low-Frequency Oscillator (REFO)
    19. 5.19 DCO Frequency
    20. 5.20 PMM, Brownout Reset (BOR)
    21. 5.21 PMM, Core Voltage
    22. 5.22 PMM, SVS High Side
    23. 5.23 PMM, SVM High Side
    24. 5.24 PMM, SVS Low Side
    25. 5.25 PMM, SVM Low Side
    26. 5.26 Wake-up Times From Low-Power Modes and Reset
    27. 5.27 Timer_A, Timers TA0, TA1, and TA2
    28. 5.28 Timer_B, Timer TB0
    29. 5.29 Battery Backup
    30. 5.30 USCI (UART Mode)
    31. 5.31 USCI (SPI Master Mode)
    32. 5.32 USCI (SPI Slave Mode)
    33. 5.33 USCI (I2C Mode)
    34. 5.34 12-Bit ADC, Power Supply and Input Range Conditions
    35. 5.35 12-Bit ADC, Timing Parameters
    36. 5.36 12-Bit ADC, Linearity Parameters Using an External Reference Voltage
    37. 5.37 12-Bit ADC, Linearity Parameters Using AVCC as Reference Voltage
    38. 5.38 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
    39. 5.39 12-Bit ADC, Temperature Sensor and Built-In VMID
    40. 5.40 REF, External Reference
    41. 5.41 REF, Built-In Reference
    42. 5.42 12-Bit DAC, Supply Specifications
    43. 5.43 12-Bit DAC, Linearity Specifications
    44. 5.44 12-Bit DAC, Output Specifications
    45. 5.45 12-Bit DAC, Reference Input Specifications
    46. 5.46 12-Bit DAC, Dynamic Specifications
    47. 5.47 12-Bit DAC, Dynamic Specifications (Continued)
    48. 5.48 Comparator_B
    49. 5.49 Ports PU.0 and PU.1
    50. 5.50 USB Output Ports DP and DM
    51. 5.51 USB Input Ports DP and DM
    52. 5.52 USB-PWR (USB Power System)
    53. 5.53 USB-PLL (USB Phase-Locked Loop)
    54. 5.54 Flash Memory
    55. 5.55 JTAG and Spy-Bi-Wire Interface
  6. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  CPU
    3. 6.3  Instruction Set
    4. 6.4  Operating Modes
    5. 6.5  Interrupt Vector Addresses
    6. 6.6  Memory
    7. 6.7  Bootloader (BSL)
      1. 6.7.1 USB BSL
      2. 6.7.2 UART BSL
    8. 6.8  JTAG Operation
      1. 6.8.1 JTAG Standard Interface
      2. 6.8.2 Spy-Bi-Wire Interface
    9. 6.9  Flash Memory (Link to User's Guide)
    10. 6.10 RAM (Link to User's Guide)
    11. 6.11 Backup RAM
    12. 6.12 Peripherals
      1. 6.12.1  Digital I/O (Link to User's Guide)
      2. 6.12.2  Port Mapping Controller (Link to User's Guide)
      3. 6.12.3  Oscillator and System Clock (Link to User's Guide)
      4. 6.12.4  Power-Management Module (PMM) (Link to User's Guide)
      5. 6.12.5  Hardware Multiplier (MPY) (Link to User's Guide)
      6. 6.12.6  Real-Time Clock (RTC_B) (Link to User's Guide)
      7. 6.12.7  Watchdog Timer (WDT_A) (Link to User's Guide)
      8. 6.12.8  System Module (SYS) (Link to User's Guide)
      9. 6.12.9  DMA Controller (Link to User's Guide)
      10. 6.12.10 Universal Serial Communication Interface (USCI) (Links to User's Guide: UART Mode, SPI Mode, I2C Mode)
      11. 6.12.11 Timer TA0 (Link to User's Guide)
      12. 6.12.12 Timer TA1 (Link to User's Guide)
      13. 6.12.13 Timer TA2 (Link to User's Guide)
      14. 6.12.14 Timer TB0 (Link to User's Guide)
      15. 6.12.15 Comparator_B (Link to User's Guide)
      16. 6.12.16 ADC12_A (Link to User's Guide)
      17. 6.12.17 DAC12_A (Link to User's Guide)
      18. 6.12.18 CRC16 (Link to User's Guide)
      19. 6.12.19 Voltage Reference (REF) Module (Link to User's Guide)
      20. 6.12.20 USB Universal Serial Bus (Link to User's Guide)
      21. 6.12.21 Embedded Emulation Module (EEM) (Link to User's Guide)
      22. 6.12.22 Peripheral File Map
    13. 6.13 Input/Output Diagrams
      1. 6.13.1  Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 6.13.2  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 6.13.3  Port P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger
      4. 6.13.4  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 6.13.5  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      6. 6.13.6  Port P5 (P5.2 to P5.7) Input/Output With Schmitt Trigger
      7. 6.13.7  Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      8. 6.13.8  Port P7 (P7.2) Input/Output With Schmitt Trigger
      9. 6.13.9  Port P7 (P7.3) Input/Output With Schmitt Trigger
      10. 6.13.10 Port P7 (P7.4 to P7.7) Input/Output With Schmitt Trigger
      11. 6.13.11 Port P8 (P8.0 to P8.7) Input/Output With Schmitt Trigger
      12. 6.13.12 Port P9 (P9.0 to P9.7) Input/Output With Schmitt Trigger
      13. 6.13.13 Port PU (PU.0/DP, PU.1/DM, PUR) USB Ports
      14. 6.13.14 Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      15. 6.13.15 Port PJ (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    14. 6.14 Device Descriptors
  7. 7デバイスおよびドキュメントのサポート
    1. 7.1  使い始めと次の手順
    2. 7.2  Device Nomenclature
    3. 7.3  ツールとソフトウェア
    4. 7.4  ドキュメントのサポート
    5. 7.5  関連リンク
    6. 7.6  Community Resources
    7. 7.7  商標
    8. 7.8  静電気放電に関する注意事項
    9. 7.9  Export Control Notice
    10. 7.10 Glossary
  8. 8メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Timer TB0 (Link to User's Guide)

Timer TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers. TB0 supports multiple capture/compares, PWM outputs, and interval timing (see Table 6-16). TB0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each capture/compare register.

Table 6-16 Timer TB0 Signal Connections

INPUT PIN NUMBER DEVICE INPUT SIGNAL MODULE INPUT SIGNAL MODULE BLOCK MODULE OUTPUT SIGNAL DEVICE OUTPUT SIGNAL OUTPUT PIN NUMBER
PZ ZQW PZ ZQW
58-P8.0
P2MAPx(3)
J11-P8.0
P2MAPx(3)
TB0CLK TB0CLK Timer NA NA
ACLK ACLK
SMCLK SMCLK
58-P8.0
P2MAPx(3)
J11-P8.0
P2MAPx(3)
TB0CLK TB0CLK
50-P4.0 J9-P4.0 TB0.0 CCI0A CCR0 TB0 TB0.0 50-P4.0 J9-P4.0
P2MAPx(3) P2MAPx(3) TB0.0 CCI0B P2MAPx(3) P2MAPx(3)
DVSS GND ADC12 (internal) (1)
ADC12SHSx = \{2\}
DVCC VCC
51-P4.1 M11-P4.1 TB0.1 CCI1A CCR1 TB1 TB0.1 51-P4.1 M11-P4.1
P2MAPx(3) P2MAPx(3) TB0.1 CCI1B P2MAPx(3) P2MAPx(3)
DVSS GND ADC12 (internal) (1)
ADC12SHSx = \{3\}
DVCC VCC
52-P4.2 L10-P4.2 TB0.2 CCI2A CCR2 TB2 TB0.2 52-P4.2 L10-P4.2
P2MAPx(3) P2MAPx(3) TB0.2 CCI2B P2MAPx(3) P2MAPx(3)
DVSS GND DAC12_A(2)
DAC12_0, DAC12_1 (internal)
DVCC VCC
53-P4.3 M12-P4.3 TB0.3 CCI3A CCR3 TB3 TB0.3 53-P4.3 M12-P4.3
P2MAPx(3) P2MAPx(3) TB0.3 CCI3B P2MAPx(3) P2MAPx(3)
DVSS GND
DVCC VCC
54-P4.4 L12-P4.4 TB0.4 CCI4A CCR4 TB4 TB0.4 54-P4.4 L12-P4.4
P2MAPx(3) P2MAPx(3) TB0.4 CCI4B P2MAPx(3) P2MAPx(3)
DVSS GND
DVCC VCC
55-P4.5 L11-P4.5 TB0.5 CCI5A CCR5 TB5 TB0.5 55-P4.5 L11-P4.5
P2MAPx(3) P2MAPx(3) TB0.5 CCI5B P2MAPx(3) P2MAPx(3)
DVSS GND
DVCC VCC
56-P4.6 K11-P4.6 TB0.6 CCI6A CCR6 TB6 TB0.6 56-P4.6 K11-P4.6
P2MAPx(3) P2MAPx(3) TB0.6 CCI6B P2MAPx(3) P2MAPx(3)
DVSS GND
DVCC VCC
Only on devices with peripheral module ADC12_A.
Only on devices with peripheral module DAC12_A.
Timer functions selectable by the port mapping controller.