JAJSGL4 December   2018 OPA2313-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      EMIRR IN+と周波数との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: OPA2313-Q1
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: 5.5 V
    6. 6.6 Electrical Characteristics: 1.8 V
    7. 6.7 Typical Characteristics: Tables of Graphs
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Rail-to-Rail Input
      3. 7.3.3 Rail-to-Rail Output
      4. 7.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 EMI Susceptibility and Input Filtering
      7. 7.3.7 Input and ESD Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Electrical Characteristics: 1.8 V(1)


For VS= (V+) – (V–) = 1.8 V at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS+ – 1.3 V, and VOUT = VS / 2, (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage 0.5 2.5 mV
dVOS/dT Input offset voltage vs temperature TA = –40°C to 125°C 2 µV/°C
PSRR Power-supply rejection ratio TA = –40°C to 125°C 74 90 dB
Channel separation, dc At dc 10 µV/V
INPUT VOLTAGE RANGE
VCM Common-mode voltage range No phase reversal, rail-to-rail input (V–) – 0.2 (V+) + 0.2 V
CMRR Common-mode rejection ratio (V–) – 0.2 V < VCM < (V+) – 1.3 V TA = –40°C to 125°C 70 85 dB
VS= 1.8 V, VCM = –0.2 V to 1.8 V 58 73
VCM = –0.2 V to 1.6 V TA = –40°C to 125°C 58 70
INPUT BIAS CURRENT
IB Input bias current ±0.2 ±10 pA
TA = –40°C to 85°C(2) ±50
TA = –40°C to 125°C(2) ±600
IOS Input offset current ±0.2 ±10 pA
TA = –40°C to 85°C(2) ±50
TA = –40°C to 125°C(2) ±600
NOISE
Input voltage noise (peak-to-peak) f = 0.1 Hz to 10 Hz 6 µVPP
en Input voltage noise density f = 10 kHz 22 nV/√Hz
f = 1 kHz 25
in Input current noise density f = 1 kHz 5 fA/√Hz
INPUT CAPACITANCE
CIN Differential 1 pF
Common-mode 5
OPEN-LOOP GAIN
AOL Open-loop voltage gain 0.05 V < VO < (V+) – 0.05 V, RL = 100 kΩ 100 110 dB
0.1 V < VO < (V+) – 0.1 V TA = –40°C to 125°C 90 110
FREQUENCY RESPONSE
GBW Gain-bandwidth product CL = 10 pF 0.9 MHz
SR Slew rate G = +1 0.45 V/µs
tS Settling time To 0.1%, VS = 5 V, 2-V step, G = +1 5 µs
To 0.01%, VS = 5 V, 2-V step, G = +1 6
Overload recovery time VS = 5 V, VIN × Gain > VS 3
THD+N Total harmonic distortion + noise(3) VS = 5 V, VO = 1 VRMS, G = +1, f = 1kHz 0.0045%
OUTPUT
VO Voltage output swing from supply rails RL = 100 kΩ(2) 5 15 mV
RL = 100 kΩ(2) TA = –40°C to 125°C 30
RL = 2 kΩ(2) 25 50
RL = 2 kΩ(2) TA = –40°C to 125°C 125
ISC Short-circuit current ±6 mA
RO Open-loop output impedance 2300 Ω
POWER SUPPLY
VS Specified voltage range 1.8 (±0.9) 5.5 (±2.75) V
IQ Quiescent current per amplifier VS = 5 V, IO = 0 mA 50 60 µA
Power-on time VS = 0 V to 5 V, to 90% IQ level 10 µs
(1) Parameters with minimum or maximum specification limits are 100% production tested at 25°C, unless otherwise noted. Over-temperature limits are based on characterization and statistical analysis.
(2) Specified by design and characterization; not production tested.
(3) Third-order filter; bandwidth = 80 kHz at –3 dB.