JAJSFO4B August   2017  – December 2018 OPA2810

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     マルチチャネル・センサ・インターフェイス
  3. 3 概要
    1.     高調波歪みと周波数との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: 10 V
    6. 6.6  Electrical Characteristics: 24 V
    7. 6.7  Electrical Characteristics: 5 V
    8. 6.8  Typical Characteristics: VS = 10 V
    9. 6.9  Typical Characteristics: VS = 24 V
    10. 6.10 Typical Characteristics: VS = 5 V
    11. 6.11 Typical Characteristics: ±2.375 V to ±12 V Split Supply
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 ESD Protection
    3. 7.3 Feature Description
      1. 7.3.1 OPA2810 Comparison
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±2.375 V to ±13.5 V)
      2. 7.4.2 Single-Supply Operation (4.75 V to 27 V)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Selection of Feedback Resistors
      2. 8.1.2 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Multichannel Sensor Interface
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermal Considerations
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.1.2 Detailed Design Procedure

Designs that require high bandwidth from a large area detector with relatively high transimpedance gain benefit from the low input voltage noise of the OPA2810. This input voltage noise is peaked up over frequency by the diode source capacitance, and can, in many cases, become the limiting factor to input sensitivity. The key elements to the design are the expected diode capacitance (CD) with the reverse bias voltage (VBIAS) applied, the desired transimpedance gain, RF, and the GBWP for the OPA2810 (70 MHz). Figure 74 shows a transimpedance circuit with the parameters as described in Table 3. With these three variables set (and including the parasitic input capacitance for the OPA2810 and the PCB added to CD), the feedback capacitor value (CF) may be set to control the frequency response. Transimpedance Considerations for High-Speed Amplifiers application report discusses using high-speed amplifiers for transimpedance applications. To achieve a maximally-flat second-order Butterworth frequency response, set the feedback pole to:

Equation 7. OPA2810 eq01.gif

The input capacitance of the amplifier is the sum of the common-mode and differential capacitance (2.5 + 0.5) pF. The parasitic capacitance from the photodiode package and the PCB is approximately 0.3 pF. Using Equation 3, this results in a total input capacitance of CD = 23.3 pF. From Equation 7, set the feedback pole at 1.55 MHz. Setting the pole at 1.55 MHz requires a total feedback capacitance of 1.03 pF.

The approximate –3-dB bandwidth of the transimpedance amplifier circuit is shown in:

Equation 8. OPA2810 eq02.gif

Equation 8 estimates a closed-loop bandwidth of 2.19 MHz. Figure 75 and Figure 76 show the loop-gain magnitude and phase plots from the TINA-TI simulations of the transimpedance amplifier circuit of Figure 74. The 1/β gain curve has a zero from RF and CIN at 70 kHz and a pole from RF and CF cancelling the 1/β zero at 1.5 MHz resulting in a 20 dB/decade rate-of-closure at the loop gain crossover frequency (freqeuncy where AOL = 1/β), ensuring a stable circuit. A phase margin of 62° is obtained with a closed-loop bandwidth of 3 MHz and a 100-kΩ transimpedance gain.

OPA2810 D804_TIA_Gain_Vs_Frequency.gifFigure 75. Loop-Gain Magnitude vs Frequency for Transimpedance Amplifier Circuit of Figure 74
OPA2810 D805_TIA_Phase_Vs_Frequency.gifFigure 76. Loop-Gain Phase vs Frequency for Transimpedance Amplifier Circuit of Figure 74