JAJSDM5B May   2017  – November 2017 TLV7011 , TLV7021

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
      2. 7.4.2 Internal Hysteresis
      3. 7.4.3 Output
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Inverting Comparator With Hysteresis for TLV7011
      2. 8.1.2 Noninverting Comparator With Hysteresis for TLV7011
    2. 8.2 Typical Applications
      1. 8.2.1 Window Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 IR Receiver Analog Front End
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Square-Wave Oscillator
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 評価モジュール
    2. 11.2 関連リンク
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • DPW|5
  • DCK|5
発注情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The TLV7011 and TLV7021 are micro-power comparators with reasonable response time. The comparators have a rail-to-rail input stage that can monitor signals beyond the positive supply rail with integrated hysteresis. When higher levels of hysteresis are required, positive feedback can be externally added. The push-pull output stage of the TLV7011 is optimal for reduced power budget applications and features no shoot-through current. When level shifting or wire-ORing of the comparator outputs is needed, the TLV7021 with its open-drain output stage is well suited to meet the system needs. In either case, the wide operating voltage range, low quiescent current, and micro-package of the TLV7011 and TLV7021 make these comparators excellent candidates for battery-operated and portable, handheld designs.

Inverting Comparator With Hysteresis for TLV7011

The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply voltage (VCC), as shown in Figure 38. When VIN at the inverting input is less than VA, the output voltage is high (for simplicity, assume VO switches as high as VCC). The three network resistors can be represented as R1 || R3 in series with R2. Equation 1 defines the high-to-low trip voltage (VA1).

Equation 1. TLV7011 TLV7021 q_va1_bos561.gif

When VIN is greater than VA, the output voltage is low, very close to ground. In this case, the three network resistors can be presented as R2 || R3 in series with R1. Use Equation 2 to define the low to high trip voltage (VA2).

Equation 2. TLV7011 TLV7021 q_va2_bos561.gif

Equation 3 defines the total hysteresis provided by the network.

Equation 3. TLV7011 TLV7021 q_delta_va_bos561.gif
TLV7011 TLV7021 ai_inverting_bos561.gif Figure 38. TLV7011 in an Inverting Configuration With Hysteresis

Noninverting Comparator With Hysteresis for TLV7011

A noninverting comparator with hysteresis requires a two-resistor network, as shown in Figure 39, and a voltage reference (VREF) at the inverting input. When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise to VIN1. Use Equation 4 to calculate VIN1.

Equation 4. TLV7011 TLV7021 q_vin1_bos694.gif

When VIN is high, the output is also high. For the comparator to switch back to a low state, VIN must drop to VIN2 such that VA is equal to VREF. Use Equation 5 to calculate VIN2.

Equation 5. TLV7011 TLV7021 q_vin2_bos561.gif

The hysteresis of this circuit is the difference between VIN1 and VIN2, as shown in Equation 6.

Equation 6. TLV7011 TLV7021 q_delta_vin_bos561.gif
TLV7011 TLV7021 ai_noninverting_bos561.gif Figure 39. TLV7011 in a Noninverting Configuration With Hysteresis

Typical Applications

Window Comparator

Window comparators are commonly used to detect undervoltage and overvoltage conditions. Figure 40 shows a simple window comparator circuit.

TLV7011 TLV7021 Window_Comparator.gif Figure 40. Window Comparator

Design Requirements

For this design, follow these design requirements:

  • Alert (logic low output) when an input signal is less than 1.1 V
  • Alert (logic low output) when an input signal is greater than 2.2 V
  • Alert signal is active low
  • Operate from a 3.3-V power supply

Detailed Design Procedure

Configure the circuit as shown in Figure 40. Connect VCC to a 3.3-V power supply and VEE to ground. Make R1, R2 and R3 each 10-MΩ resistors. These three resistors are used to create the positive and negative thresholds for the window comparator (VTH+ and VTH–). With each resistor being equal, VTH+ is 2.2 V and VTH- is 1.1 V. Large resistor values such as 10-MΩ are used to minimize power consumption. The sensor output voltage is applied to the inverting and noninverting inputs of the two TLV7021's. The TLV7021 is used for its open-drain output configuration. Using the TLV7021 allows the two comparator outputs to be Wire-Ored together. The respective comparator outputs will be low when the sensor is less than 1.1 V or greater than 2.2 V. VOUT will be high when the sensor is in the range of 1.1 V to 2.2 V.

Application Curve

TLV7011 TLV7021 Application_Curve.gif Figure 41. Window Comparator Results

IR Receiver Analog Front End

A single TLV7011 device can be used to build a complete IR receiver analog front end (AFE). The nanoamp quiescent current and low input bias current make it possible to be powered with a coin cell battery, which could last for years.

TLV7011 TLV7021 tlv70xx-ir-receiver-slvse13.gif Figure 42. IR Receiver Analog Front End Using TLV7011

Design Requirements

For this design, follow these design requirements:

  • Use a proper resistor (R1) value to generate an adequate signal amplitude applied to the inverting input of the comparator.
  • The low input bias current IB (2 pA typical) ensures that a greater value of R1 to be used.
  • The RC constant value (R2 and C1) must support the targeted data rate (that is, 9,600 bauds) to maintain a valid tripping threshold.
  • The hysteresis introduced with R3 and R4 helps to avoid spurious output toggles.

Detailed Design Procedure

The IR receiver AFE design is highly streamlined and optimized. R1 converts the IR light energy induced current into voltage and applies to the inverting input of the comparator. Because a reverse biased IR LED is used as the IR receiver, a higher I/V transimpedance gain is required to boost the amplitude of reduced current. A 10M resistor is used as R1 to support a 1-V, 100-nA transimpedance gain. This is made possible with the picoamps Input bias current IB (5pA typical). The RC network of R2 and C1 establishes a reference voltage Vref which tracks the mean amplitude of the IR signal. The RC constant of R2 and C1 (about 4.7 ms) is chosen for Vref to track the received IR current fluctuation but not the actual data bit stream. The noninverting input is connected to Vref and the output over the R3 and R4 resistor network which provides additional hysteresis for improved guard against spurious toggles.

To reduce the current drain from the coin cell battery, data transmission must be short and infrequent.

Application Curve

TLV7011 TLV7021 tlv70xx-timing-diagram-slvse13.gif Figure 43. IR Receiver AFE Waveforms

Square-Wave Oscillator

Square-wave oscillator can be used as low cost timing reference or system supervisory clock source.

TLV7011 TLV7021 fbd-01-slvsdm5.png Figure 44. Square-Wave Oscillator

Design Requirements

The square-wave period is determined by the RC time constant of the capacitor and resistor. The maximum frequency is limited by propagation delay of the device and the capacitance load at the output. The low input bias current allows a lower capacitor value and larger resistor value combination for a given oscillator frequency, which may help to reduce BOM cost and board space.

Detailed Design Procedure

The oscillation frequency is determined by the resistor and capacitor values. The following calculation provides details of the steps.

TLV7011 TLV7021 fbd-02-slvsdm5.png Figure 45. Square-Wave Oscillator Timing Thresholds

First consider the output of Figure Figure 44 is high which indicates the inverted input VC is lower than the noninverting input (VA). This causes the C1 to be charged through R4, and the voltage VC increases until it is equal to the noninverting input. The value of VA at the point is calculated by Equation 7.

Equation 7. TLV7011 TLV7021 equation-slvsdm5-1.gif

if R1 = R2= R3, then VA1 = 2 VCC/ 3

At this time the comparator output trips pulling down the output to the negative rail. The value of VAat this point is calculated by Equation 8.

Equation 8. TLV7011 TLV7021 equation-SLVsdm5x-2.gif

if R1 = R2 = R3, then VA2 = VCC/3

The C1 now discharges though the R4, and the voltage VCC decreases until it reaches VA2. At this point, the output switches back to the starting state. The oscillation period equals to the time duration from for C1 from 2VCC/3 to VCC / 3 then back to 2VCC/3, which is given by R4C1 × ln 2 fro each trip. Therefore, the total time duration is calculated as 2 R4C1 × ln 2. The oscillation frequency can be obtained by Equation 9:

Equation 9. TLV7011 TLV7021 eq_9_SLVSDM5.gif

Application Curve

Figure 46 shows the simulated results of tan oscillator using the following component values:

  • R1 = R2 = R3 = R4 = 100 kΩ
  • C1 = 100 pF, CL = 20 pF
  • V+ = 5 V, V– = GND
  • Cstray (not shown) from VA TO GND = 10 pF

TLV7011 TLV7021 fbd-03-slvsdm5.gif Figure 46. Square-Wave Oscillator Output Waveform