JAJS408M June   2008  – June 2018 TPS735

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     代表的なアプリケーション
  4. 4 改訂履歴
    1.     Pin Configuration and Functions
      1.      Pin Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  6. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit
      2. 6.3.2 Shutdown
      3. 6.3.3 Dropout Voltage
      4. 6.3.4 Start-Up and Noise Reduction Capacitor
      5. 6.3.5 Transient Response
      6. 6.3.6 Undervoltage Lockout
      7. 6.3.7 Minimum Load
      8. 6.3.8 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  7. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Input and Output Capacitor Requirements
        2. 7.2.1.2 Feed-Forward Capacitor Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Noise
      3. 7.2.3 Application Curves
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 9.2 Layout Example
    3. 9.3 Power Dissipation
    4. 9.4 Estimating Junction Temperature
    5. 9.5 Package Mounting
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 デバイス・サポート
      1. 10.1.1 開発サポート
        1. 10.1.1.1 評価モジュール
      2. 10.1.2 デバイスの項目表記
    2. 10.2 ドキュメントのサポート
      1. 10.2.1 関連資料
    3. 10.3 商標
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 Glossary
  11. 11メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

over operating temperature range (–40°C ≤ TJ ≤ 125°C), VIN = VOUT(nom) + 0.5 V or 2.7 V (whichever is greater), IOUT = 1 mA, VEN = VIN, COUT = 2.2 μF, and CNR = 10 nF (unless otherwise noted). For the adjustable version (TPS73501), VOUT = 3 V. Typical values are at TA = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage(1) 2.7 6.5 V
VFB Internal reference (adjustable version only) TJ = 25°C 1.196 1.208 1.220 V
VOUT Output voltage range
(adjustable version only)		 VFB 6 V
DC output accuracy(1) 1 mA ≤ IOUT ≤ 500 mA,
VOUT + 0.5 V ≤ VIN < 6.5 V		 VOUT > 2.2 V –2% ±1% 2%
VOUT ≤ 2.2 V –3% ±1% 3%
ΔVOUT(ΔVIN) Line regulation(1) VOUT(nom) + 0.5 V ≤ VIN ≤ 6.5 V 0.02 %/V
ΔVOUT(ΔIOUT) Load regulation 500 µA ≤ IOUT ≤ 500 mA 0.005 %/mA
VDO Dropout voltage(2)
(VIN = VOUT(nom) – 0.1 V)		 IOUT = 500 mA 280 500 mV
ILIM Output current limit VOUT = 0.9 × VOUT(nom), VIN = VOUT(nom) + 0.9 V
VIN ≥ 2.7 V		 800 1170 1900 mA
IGND Ground pin current 10 mA ≤ IOUT ≤ 500 mA 45 65 μA
ISHDN Shutdown current VEN ≤ 0 V 0.15 1 μA
IFB Feedback pin current
(adjustable version only)		 VOUT(nom) = 1.2 V –0.5 0.5 μA
PSRR Power-supply rejection ratio VIN = 3.85 V
VOUT = 2.85 V
CNR = 0.01 µF
IOUT = 100 mA		 f = 100 Hz 66 dB
f = 1k Hz 68
f = 10 kHz 44
f = 100 kHz 22
Vn Output noise voltage BW = 10 Hz to 100 kHz, VOUT = 2.8 V CNR = 10 nF 11 × VOUT μVRMS
CNR = none 95 × VOUT
tSTR Start-up time CNR = none 45 μs
CNR = 1 nF 45
CNR = 10 nF 50
CNR = 47 nF 50
VEN(HI) Enable high (enabled) 1.2 V
VEN(LO) Enable low (shutdown) 0.4 V
IEN(HI) Enable pin current, enabled VEN = VIN = 6.5 V 0.03 1 μA
Tsd Thermal shutdown temperature Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 145
UVLO Undervoltage lockout VIN rising 1.9 2.2 2.65 V
Vhys Hysteresis VIN falling 70 mV
(1) Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater.
(2) VDO is not measured for this family of devices with VOUT(nom) < 2.8 V because the minimum VIN = 2.7 V.