SBVS343 March   2019 TPS7A78

ADVANCE INFORMATION for pre-production products; subject to change without notice.  

  1. Features
  2. Applications
    1.     Typical Schematic
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Active Bridge Control
      2. 7.3.2 Full Bridge (FB) and Half Bridge Configurations
      3. 7.3.3 4 to 1 Switch Capacitor Voltage Reduction
      4. 7.3.4 VLDO_IN Overvoltage Protection
      5. 7.3.5 Dropout Voltage Regulation
      6. 7.3.6 Current Limit
      7. 7.3.7 Programmable Power-Fail Detection
      8. 7.3.8 Power-Good (PG) Detection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation: AC Input mode
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disabled Mode
      4. 7.4.4 Normal Operation: DC Input mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Cap-Drop Capacitor CS
      3. 8.1.3 Surge Resistor RS
      4. 8.1.4 Input and Output Capacitors Requirements
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
発注情報

Pin Configuration and Functions

TPS7A78: PWP Package
14-Pin TSSOP
Top View
TPS7A78 TPS7A78TSSOP14.gif

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 SC1– Power Negative terminal of the switch capacitor voltage reduction stage pin. Connect a 1-µF X5R or better dielectric 16-V rated capacitor between this pin and the SC1+ pin. Place the capacitor as close to the device as possible and see the Recommended Operating Conditions table for more details.
2 SC1+ Power Positive terminal of the switch capacitor voltage reduction stage pin. Connect a 1-µF X5R or better dielectric 16-V rated capacitor between this pin and the SC1– pin. Place the capacitor as close to the device as possible and see the Recommended Operating Conditions table for more details.
3 SCIN(1) Power Rectified DC voltage pin. Use a minimum of 35-V rated aluminum electrolytic 22-µF capacitor or greater between SCIN and GND. Place the CSCIN capacitor as close to the device as possible and see the Input and Output Capacitors Requirements section for proper calculation of the CSCIN capacitor for specific application requirements.
4 PFD Input Power failure detect pin. This pin is an analog input to an internal comparator from the resistor divider off SCIN voltage that sets a threshold to detect the AC mains have failed as an early warning; see the Recommended Operating Conditions table and the Programmable Power Fail Detection section for calculating the resistor divider values.
5 AC+ Power This pin is the AC supply LINE or neutral input to the device pin after the cap-drop capacitor and surge resistor. Either this pin or the AC– pin MUST have the cap-drop capacitor and surge resistor in series with LINE. Never connect the AC+ or AC- pins directly to the mains. See the Application Information section for details on calculating the cap-drop capacitor CS and surge resistor RS.
6 GND Power Ground pin. All ground pins must be grounded. Connect this pin to the thermal pad at the bottom of the device; see the Layout and Layout Example sections for more details.
7 AC– Power This pin is the AC supply LINE or neutral input to the device pin after the cap-drop capacitor and surge resistor. Either this pin or the AC+ pin MUST have the cap-drop capacitor and surge resistor in series with LINE. Never connect the AC- or AC+ pins directly to the mains. See the Application Information section for details on calculating the cap-drop capacitor CS and surge resistor RS.
8 LDO_OUT Power Regulated DC output pin. Connect a minimum of 0.68-µF X5R or better dielectric capacitor between this pin and GND. Place the CLDO_OUT capacitor as close to the device as possible and see the Recommended Operating Conditions table for more details.
9 LDO_IN (2) Power Charge-pump output pin. Connect a minimum of 0.68-µF X5R or better dielectric capacitor between this pin and GND. For optimal performance, connect a capacitor size of 10x the value of CLDO_OUT . Place the capacitor as close to the device as possible, and refer to Recommended Operating Conditions table for more details.
10 PF Output Power-fail pin. This pin is an open-drain indicator to show that input AC power is falling. Pullup this pin externally to the LDO_IN pin. The PF pin goes low when VPFD < VPFD (Falling) as listed in the Electrical Characteristics table. See the Recommended Operating Conditions table for proper selection of the pullup resistor.
11 PG Output Power-good pin. This pin is an open-drain indicator that shows VLDO_OUT > VPG(rising), as listed in Electrical Characteristics table. Pullup this pin externally to the LDO_IN pin. See the Recommended Operating Conditions table for proper selection of the pullup resistor.
12 GND Power This pin is the device ground pin. Connect this pin to GND and the thermal pad at the bottom of the device; see the Layout and Layout Example sections for more details.
13 SC2+(3) Power Positive terminal of the switch capacitor voltage reduction stage. Connect a minimum 1-µF X5R or better dielectric 7-V rated capacitor between this pin and the SC2- pin. Place the capacitor as close to the device as possible and see the Recommended Operating Conditions table for more details.
14 SC2–(3) Power Negative terminal of the switch capacitor voltage reduction stage. Connect a minimum 1-µF X5R or better dielectric 16-V rated capacitor between this pin and the SC2+ pin. Place the capacitor as close to the device as possible and see the Recommended Operating Conditions table for more details.
If the application requires a hold-up time; the value of the SCIN capacitor can be increased without oversizing the capacitor because doing so makes the startup time longer.
The LDO_IN pin is a internally driven pin and must not be driven externally.
Use a 2.2-µF X5R or X7R dielectric 7-V rated capacitor for applications that require load current close to the maximum current.