SLUSBP4B August   2013  – October 2014 UCC27524A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Supply Current
      2. 8.3.2 Input Stage
      3. 8.3.3 Enable Function
      4. 8.3.4 Output Stage
      5. 8.3.5 Low Propagation Delays And Tightly Matched Outputs
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VDD and Undervoltage Lockout
        2. 9.2.2.2 Drive Current and Power Dissipation
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Protection
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Description (Continued)

For safety purpose, internal pull-up and pull-down resistors on the input pins of the UCC27524A ensure that outputs are held LOW when input pins are in floating condition. UCC27524A features Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC27524A family of devices are available in SOIC-8 (D), VSSOP-8 with exposed pad (DGN) packages.