JAJSC44B August   2015  – March 2017 UCC27714

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD and Under Voltage Lockout
      2. 7.3.2 Input and Output Logic Table
      3. 7.3.3 Input Stage
      4. 7.3.4 Output Stage
      5. 7.3.5 Level Shift
      6. 7.3.6 Low Propagation Delays and Tightly Matched Outputs
      7. 7.3.7 Parasitic Diode Structure in UCC27714
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Function
      2. 7.4.2 Minimum Input Pulse Operation
      3. 7.4.3 Operation with HO and LO Outputs High Simultaneously
      4. 7.4.4 Operation Under 100% Duty Cycle Condition
      5. 7.4.5 Operation Under Negative HS Voltage Condition
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selecting HI and LI Low Pass Filter Components (RHI, RLI, CHI, CLI)
        2. 8.2.2.2 Selecting Bootstrap Capacitor (CBOOT)
        3. 8.2.2.3 Selecting VDD Bypass/Holdup Capacitor (CVDD) and Rbias
        4. 8.2.2.4 Selecting Bootstrap Resistor (RBOOT)
        5. 8.2.2.5 Selecting Gate Resistor RHO/RLO
        6. 8.2.2.6 Selecting Bootstrap Diode
        7. 8.2.2.7 Estimate the UCC27714 Power Losses (PUCC27714)
        8. 8.2.2.8 Application Example Schematic Note
        9. 8.2.2.9 LO and HO Overshoot and Undershoot
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
    5. 11.5 ドキュメントの更新通知を受け取る方法
    6. 11.6 コミュニティ・リソース
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Power Supply Recommendations

The VDD power terminal for the device requires the placement of electrolytic capacitor as energy storage capacitor, because of UCC27714 is 4-A, peak-current driver. And requires the placement of low-esr noise-decoupling capacitance as directly as possible from the VDD terminal to the VSS terminal, ceramic capacitors with stable dielectric characteristics over temperature are recommended, such as X7R or better.

The recommended e-capacitor is a 22-µF, 50-V capacitor. The recommended decoupling capacitors are a 1-µF 0805-sized 50-V X7R capacitor, ideally with (but not essential) a second smaller parallel 100-nF 0603-sized 50-V X7R capacitor.

Similarly, a low-esr X7R capacitance is recommended for the HB-HS power terminals which must be placed as close as possible to device pins.

As described earlier in VDD and Under Voltage Lockout, the attention must be exercised to ensure that the VDD-VSS bias voltage does not dip from VDD(OFF) to 4-V level in 70 µs or less