ADS4146 14 ビット、160MSPS、低消費電力 AD コンバータ | TIJ.co.jp

ADS4146
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14 ビット、160MSPS、低消費電力 AD コンバータ

14 ビット、160MSPS、低消費電力 AD コンバータ - ADS4146
データシート
 

概要

The ADS412x/4x are a family of 12-bit/14-bit analog-to-digital converters (ADCs) with sampling rates up to 250MSPS. These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS412x/4x have fine gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. They include a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

The ADS412x/4x are available in a compact QFN-48 package and are specified over the industrial temperature range (–40°C to +85°C)

特長

  • Maximum Sample Rate: 250MSPS
  • Ultralow Power with 1.8V Single Supply:
    • 201mW Total Power at 160MSPS
    • 265mW Total Power at 250MSPS
  • High Dynamic Performance:
    • SNR: 70.6dBFS at 170MHz
    • SFDR: 84dBc at 170MHz
  • Dynamic Power Scaling with Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350mV
      • Low Swing: 200mV
      • Default Strength: 100Ω Termination
      • 2x Strength: 50Ω Termination
    • 1.8V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down To 200mVPP
  • Package: QFN-48 (7mm × 7mm)

PowerPAD is a trademark of Texas Instruments Incorporated.
All other trademarks are the property of their respective owners.

機能一覧

他の製品と比較 高速 ADCs (>10MSPS) メール Excelへダウンロード
Part number オーダー・オプション Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADS4146 ご注文 160     Low Power     14     1     72.2     11.5     88     200     2     DDR LVDS
Parallel CMOS    
-40 to 85     800     No     VQFN | 48     48VQFN: 49 mm2: 7 x 7 (VQFN | 48)     Catalog     Pipeline    
ADS4122 ご注文 65     Low Power     12     1     71.1     11.2     87     95     2     DDR LVDS
Parallel CMOS    
-40 to 85     800     No     VQFN | 48     48VQFN: 49 mm2: 7 x 7 (VQFN | 48)     Catalog     Pipeline    
ADS4125 ご注文 125     Low Power     12     1     71.1     11.2     87     136     2     DDR LVDS
Parallel CMOS    
-40 to 85     800     No     VQFN | 48     48VQFN: 49 mm2: 7 x 7 (VQFN | 48)     Catalog     Pipeline    
ADS4126 ご注文 160     Low Power     12     1     70.2     11.2     88     200     2     DDR LVDS
Parallel CMOS    
-40 to 85     800     No     VQFN | 48     48VQFN: 49 mm2: 7 x 7 (VQFN | 48)     Catalog     Pipeline    
ADS4128 ご注文 200     Low Power     12     1     70     11.2     87     212     2     DDR LVDS
Parallel CMOS