ADS5273 8 チャネル、12 ビット、70MSPS ADC、シリアル LVDS インターフェイス | TIJ.co.jp

ADS5273
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8 チャネル、12 ビット、70MSPS ADC、シリアル LVDS インターフェイス

 

概要

The ADS5273 is a high-performance, CMOS, 70MSPS, 8-channel analog-to-digital converter (ADC). An internal reference is provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. Inaddition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5273 provides an internal reference, or can optionally be driven with an external reference. Best performance is achieved through the internal reference mode.

The device is available in a PowerPAD TQFP-80 package and is specified over a -40°C to +85°C operating range.

特長

  • Maximum Sample Rate: 70MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 1W
    External Reference: 937mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 71dBFS SNR at 5MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • TQFP-80 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Test Equipment
    • Military

PowerPAD Is a trademark of Texas Instruments.

機能一覧

他の製品と比較 高速 ADCs (>10MSPS) メール Excelへダウンロード
Part number オーダー・オプション Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADS5273 ご注文 70     High Performance     12     8     71.1     11.5     92     1003     2     Parallel LVDS     -40 to 85     300     No     HTQFP | 80     80HTQFP: 196 mm2: 14 x 14 (HTQFP | 80)     Catalog     Pipeline    
ADS5270 サンプルは利用できません。 40     Low Power     12     8     70.5     11.3     89     907     2     Parallel LVDS     -40 to 85     300     No     HTQFP | 80     80HTQFP: 196 mm2: 14 x 14 (HTQFP | 80)     Catalog     Pipeline    
ADS5271 サンプルは利用できません。 50     Low Power     12     8     70.5     11.3     87     957     2     Parallel LVDS     -40 to 85     300     No     HTQFP | 80     80HTQFP: 196 mm2: 14 x 14 (HTQFP | 80)     Catalog     Pipeline    
ADS5272 サンプルは利用できません。 65     Low Power     12     8     71.2     11.5     90     983     2     Parallel LVDS     -40 to 85     300     No     HTQFP | 80     80HTQFP: 196 mm2: 14 x 14 (HTQFP | 80)     Catalog     Pipeline    
ADS5277 サンプルは利用できません。 65     Low Power     10     8     61.7     10     85     845     2     Parallel LVDS     -40 to 85     300     No     HTQFP | 80     80HTQFP: 196 mm2: 14 x 14 (HTQFP | 80)     Catalog     Pipeline