ADS62C17 is a dual channel 11-bit, 200 MSPS A/D converter that combines high dynamic performance and low power consumption in a compact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width communications applications.
ADS62C17 uses TI-proprietary SNRBoost technology that can be used to overcome SNR limitation due to quantization noise for bandwidths less than Nyquist (Fs/2). It includes several useful and commonly used digital functions such as ADC offset correction, gain (0 to 6 dB in steps of 0.5 dB) and gain tuning (in fine steps of 0.001 dB).
The gain option can be used to improve SFDR performance at lower full-scale input ranges. Using the gain tuning capability, each channels gain can be set independently to improve channel-to-channel gain matching. The device also includes a dc offset correction loop that can be used to cancel the ADC offset.
Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference.
The device is specified over the industrial temperature range (40°C to 85°C).
|Part number||オーダー・オプション||Sample rate (Max) (MSPS)||Features||Resolution (Bits)||Number of input channels||SNR (dB)||ENOB (Bits)||SFDR (dB)||Power consumption (Typ) (mW)||Input range (Vp-p)||Interface||Operating temperature range (C)||Analog input BW (MHz)||Input buffer||Package Group||Package size: mm2:W x L (PKG)||Rating||Architecture|
||200||High Performance||11||2||67||10.8||85||1081||2||Parallel LVDS||-40 to 85||700||No||VQFN | 64||64VQFN: 81 mm2: 9 x 9 (VQFN | 64)||Catalog||Pipeline|
|ADS62C15||サンプルは利用できません。||125||High Performance||11||2||67.2||10.8||89||740||2||Serial LVDS||-40 to 85||450||No||VQFN | 64||64VQFN: 81 mm2: 9 x 9 (VQFN | 64)||Catalog||Pipeline|