Low Offset, Low Drift JFET Input Operational Amplifier - LF411-N

LF411-N (供給中)

Low Offset, Low Drift JFET Input Operational Amplifier

 

推奨代替製品

  • LM8261  -  広帯域幅、RRIO、無制限の容量性負荷ドライブ、低消費電力
  • LMC6081  -  帯域幅、スルー・レート、電源電流、および入力バイアス電流の大幅な向上
  • LMV710-N  -  電源電流、出力ドライブ、出力振幅の向上
  • LPC661  -  LF411-N のアップグレード

概要

These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and guaranteed input offset voltage drift. They require low supply current yet maintain a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF411 is pin compatible with the standard LM741 allowing designers to immediately upgrade the overall performance of existing designs.

These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth.


特長

Internally trimmed offset voltage:

0.5 mV(max)

Input offset voltage drift:

10 µV/°C(max)

Low input bias current:

50 pA

Low input noise current:

0.01 pA/[Radical]Hz

Wide gain bandwidth:

3 MHz(min)

High slew rate:

10V/µs(min)

Low supply current:

1.8 mA

High input impedance:

1012

Low total harmonic distortion:

<=0.02%

Low 1/f noise corner:

50 Hz

Fast settling time to 0.01%:

2 µs


BI-FET II™ is a trademark of National Semiconductor Corporation.

詳細を表示

機能一覧 他の製品と比較 汎用オペアンプ

 
Number of Channels (#)
Total Supply Voltage (Min) (+5V=5, +/-5V=10)
Total Supply Voltage (Max) (+5V=5, +/-5V=10)
GBW (Typ) (MHz)
Slew Rate (Typ) (V/us)
Rail-to-Rail
Vos (Offset Voltage @ 25C) (Max) (mV)
Iq per channel (Typ) (mA)
Vn at 1kHz (Typ) (nV/rtHz)
Rating
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
Offset Drift (Typ) (uV/C)
Additional Features
Input Bias Current (Max) (pA)
CMRR (Typ) (dB)
Output Current (Typ) (mA)
Architecture
LF411-N
1   
10   
44   
4   
15   
In to V+   
0.4   
1.8   
25   
Catalog   
0 to 70   
PDIP   
See datasheet (PDIP)   
7   
N/A   
200   
100   
25   
FET   

主要ツールとソフトウェア

WEBENCH® Designer LF411-N

Amplifier Topology
 Non-inverting
 Inverting
Desired Power Supply Voltage
Positive Supply (Vcc):  V
Negative Supply (Vee):  V
Allowed Power Supply(Vcc-Vee) = 10.0 to 36.0 V
Desired Input and Output Requirements
  Min Max
Vin  V  V
Vout  V  V
Minimum Temperature = 0.0 °C
Maximum Temperature = 70.0 °C