7.3.1 Oscillator

The oscillator, using an external LC tank (the detector), provides a wide oscillation range from 5kHz to 5MHz. The R_P upper and lower limits are programmable, to support a wide range of LC combinations. Within the R_P range of the LC tank, the oscillator amplitude is kept constant. When the LC tank R_P drops below the lower programmed limit of R_P the LMP91300 detects that the target is too close, the amplitude is reduced and the detector output will rail. See Figure 14.

Figure 14. Operating Region

7.3.2 Detection

The R_P of the external LC tank is directly converted to a digital signal. With this approach the only temperature compensation needed is that for R_P, which is done through the Look Up Table (Registers 0x00 to 0x5D).

7.3.3 Comparator

The internal digital comparator accepts the signal from the R_P to digital converter, after temperature compensation, and makes a decision, based on the value written to the DET_H_MSB and DET_H_ LSB registers. Programmable hysteresis is set by the value in the DET_L_MSB and DET_L_ LSB registers. The detection threshold can be set within the programmed R_P range.

7.3.4 Low R_P, Close Target, Under Range Switch Enable

If R_P drops below the detectable range, the LMP91300 remains functional. The following applies if at least one temperature conversion has been completed:

For low R_P start up (for example, if the target is in contact with the sensing coil when the part is powered on) UNDER_RANGE_SWITCH_EN must be set to 1 for the switch to be enabled. If UNDER_RANGE_SWITCH_EN is set to 0, the startup state is undefined when the sensor R_P < R_PMIN (for example, if the target is in contact with the sensing coil).

1. If R_P < 798Ω (for example, the metal plate is against the sensor) before the fourth conversion of the R_P to digital converter (after Power On Reset) the switch will be activated regardless of the UNDER_RANGE_SWITCH_EN setting.
2. If R_P < 798Ω after the fourth conversion the switch state depends on the setting of UNDER_RANGE_SWITCH_EN.
   1. If UNDER_RANGE_SWITCH_EN = 1: The switch will be enabled.
   2. If UNDER_RANGE_SWITCH_EN = 0: The previous switch state will be held until the oscillation restarts (R_P > 798Ω) and enough time has passed for a conversion to update the switch status.

If a temperature conversion has not been completed the switch state will not be changed.

The LMP91300 oscillator will begin to oscillate in less than 10 oscillator periods once the low R_P condition is removed.

7.3.5 Programming The Switching Point And Hysteresis

The typical procedure is that the user puts a target metal at the target distance in front of the manufactured sensor system. The PROXIMITY_MSB and Proximity LSB registers are read and the DET_H_MSB and DET_H_ LSB registers are written with a value that causes the LMP91300 to switch. The metal target is then moved to another distance, farther away than the first distance, the PROXIMITY_MSB and Proximity LSB registers are read and a value is written to the DET_L_MSB and DET_L_ LSB registers that causes the LMP91300 to switch the external transistor off.

7.3.6 Temperature Compensation

As most of the integrated electronics are in the digital domain, close to perfect performance of the LMP91300 over temperature can be expected. As the R_P factor of the external LC tank is measured, only the temperature coefficient of the LC tank losses need to be compensated for. The LMP91300 offers a digital temperature compensation feature that provides an accurate R_P detection of the external LC tank when losses are introduced due to ambient temperature changes in the operating environment. This can be done by calibrating the Temperature Look-Up Table (LUT) located in registers 0x00 to 0x5D. The calibration involves the user generating gain correction factor coefficients (GCF) and is discussed in detail in the Look-Up Table Calibration section. These registers hold 2 bytes of information representing temperatures ranging from -48°C to 136°C in 4°C increments. The LMP91300 uses linear interpolation to provide 1°C temperature steps in between these 4°C points to improve accuracy. After the LUT has been properly programmed, the Detection Threshold registers need to be programmed for the switching distances desired. The external temperature sensor and the temperature coefficients stored in the LUT produce a functional temperature compensation system. The LUT was designed for an NTC with a beta factor β = 4250 such as the Murata NCP03WF104F05RL. Any other NTC used in the design will require additional adjustments which are explained in the Look-Up Table Calibration section.

7.3.7 Power Supply

An internal regulator with an external NPN transistor is used to power the LMP91300 directly from the loop.

7.3.8 LED Drive

An external LED can be driven with the LED terminal. Red and Green LEDs are supported. The LED current can be programmed to 2.5mA or 5 mA. This LED indicates the state of the sensor. Typically the LED is on if the switch is closed, but this is programmable in the OUT_CONFIG_INIT and OUT_CONFIG_FNL registers. This LED will also indicate an output overload condition situation or ECC error.

7.3.9 SWDRV

The LMP91300 drives an external transistor, to implement a NPN or PNP function. During power up the drive terminal (SWDRV) is pulled down using a high resistance to avoid turning on the external transistor, until the LMP91300 is fully functional.

7.3.10 Overload Protection

Short circuit detection and overload protection are implemented in the LMP91300, using an external SENSE resistor, R_SENSE. When the voltage drop across R_SENSE exceeds about 310 mV the LMP91300 detects a short circuit condition. If this condition persists, the switch is toggled between being open and closed. The switch will be on for about 30µs, with a duty cycle as set in OUT_CONFIG_INIT (0x72) bit 0 (SHORTCKT_DUTY_CYCLE) or OUT_CONFIG_FNL (0x78) bit 0 (SHORTCKT_DUTY_CYCLE) to protect the external BJT. For example, if SHORTCKT_DUTY_CYCLE is set to 0.1% the switch drive will be on for 30µs and off for 29.97ms (t_OFF = (30µs/0.1%) - 30µs). During a short circuit event, the load current is limited to I=480mV/R_SENSE. The LMP91300 will come out of the overload protection mode once the drop across R_SENSE is less than 310mV.

When designing the overload protection circuitry the user must select the appropriate transistors, SWDRV current setting, R_SENSE resistor and short circuit duty cycle. The transistor should be selected to handle the load current and supply voltage both during normal operation and during an overload situation to ensure that it remains in the safe operating region at all times. The R_SENSE resistor should be chosen to set the current limit and over current threshold. The SWDRV current should be selected to ensure that during a short circuit condition the SWDRV current is capable of sourcing or sinking the programmed current depending on NPN or PNP configuration. This ensures that the short circuit control loop remains regulated and enforces the current limit and over current threshold. Once overload protection design is complete the user has the option to choose between the two duty cycle options.

7.5.1 Burning Programmed Values Into The Registers

There are three steps to burning values into the registers.

1. Burn the Temperature Look Up Table data (0x00 – 0x5D), initial registers, device information registers, and configuration registers (0x66 – 0x72).
   1. Use SWIF to program values into these registers (0x00 – 0x72).
   2. Use SWIF to write 0x08 to register 0x7F to permanently burn the values into the registers.
   3. Optional: Wait 300ms and read back the status register (0x7E). It should read 0x21 if the registers have been successfully burned.
2. Burn final registers (0x73 – 0x78).
   1. Use SWIF to program values into these registers (0x73 – 0x78).
   2. Use SWIF to write 0x10 to register 0x7F to permanently burn the values into the registers.
   3. Optional: Wait 300ms and read back the status register (0x7E). It should read 0x23 if the registers have been successfully burned.
3. Burn SWIF mode. After the device has been programmed the write function using SWIF needs to be disabled.
   1. Read Only. The SWIF write function is disabled but registers can still be read back using SWIF. Use SWIF to write 0x40 to address 0x7F. After the device is power cycled it will be read only.
   2. Disabled. The SWIF is completely disabled, both write and read functions are disabled. Use SWIF to write 0x80 to address 0x7F. After the device is power cycled SWIF will be disabled.
   3. Optional: Before power cycling the device wait 300ms and read back the status register (0x7E). It should read 0x27 for read only or 0x2F for SWIF disabled.
4. 4. It is possible to combine steps 1 and 2 and burn the Look Up Table, initial registers, device information registers, configuration registers, and final registers (0x00 – 0x78) at one time.
   1. Use SWIF to program values into these registers (0x00 – 0x78).
   2. Use SWIF to write 0x20 to register 0x7F to permanently burn the values into the registers.
   3. Optional: Wait 300ms and read back the status register (0x7E). It should read 0x23 if the registers have been successfully burned.

7.5.2 Single-Wire Interface (SWIF)

The LMP91300 uses a bi-directional Single Wire Interface protocol to program and read registers. To communicate with the LMP91300 (slave) through the SWIF interface, the micro controller (master) must transmit (write) data through the DC loop supply voltage that should be set to +8V during programming or communication. This superimposed signal of pulses transitions between 8V and 12V is on top of the +8V DC loop supply voltage. When the master transmits data into the LMP91300 the signal propagates into the SENSE2+ terminal through the supply. The master receives data from the LMP91300 through the LED terminal in the form of alternating current pulses. These current pulses will be 5mA in amplitude. The LED terminal must be connected to ground, either through an LED or directly connected to ground for the LMP91300 to talk to the master.

The communication scheme utilizes various pulse width waveforms to represent different symbols as shown in Figure 15. The binary representation of a zero bit is represented by a 25% pulse duty cycle, a one bit is represented by a 75% pulse duty cycle, and idle bit is represented by a 50% duty cycle. All pulses transmitted must fall within the pulse width specifications provided within the electrical characteristics table.

Figure 15. Single Wire Interface (SWIF) Symbol Diagram

The LMP91300 can be programmed at an input transfer bit rate between 1kbps to 10kbps. There is no acknowledge signal during the input data transfer so the master should read back the data to ensure data integrity and a successful data transfer has occurred. A read transaction is executed by the master transmitting data to configure the pointer register resulting in data output transfer by the slave. The LMP91300 transmits read back data at a speed of about 7kbps.

7.5.2.1 Write Operation

A frame begins with a minimum of one IDLE bit. To perform a write operation, the master must send an IDLE bit followed by the R/W bit set to 0 and the 7-bit address of the register that is intended to be programmed. The data to be written into the address location follows with the Most Significant Bit first and the write operation is terminated with an IDLE bit. There are 8 bits in each data byte and the maximum number of data bytes can be up to 8 bytes. Data being transmitted from the master to the slave can be terminated by the master by sending an IDLE bit after any data byte. After communication, to initiate another communication, the master must transmit another IDLE. When an invalid bit that violates the SWIF symbol protocol is transferred, the SWIF will reset and wait for the IDLE bit.

Figure 16. Complete Frame For A Write Command

7.5.2.2 Read Operation

The read signal is made by modulating the supply current. This can be read by using a SENSE resistor in the supply line. The LMP91300 modulates the supply current by sinking current into the LED terminal. The V+/EXT and LED terminals need to be connected by either an LED, resistor, or directly shorted for the Read operation to work. To perform a read operation, the master must send an IDLE bit to initiate communication, a R/W bit that should be set to 1, a 7-bit address, and another IDLE bit. Data is written back after the R/W and address byte are received so there must be a 9th rising edge to ensure that this condition is satisfied. After the last bit, A0, of the address is sent there should only be one rising edge to perform the IDLE bit. There are two valid methods of providing one rising edge, (1) a single pulse, or (2) a rising edge with the signal held high. See Figure 17 for a timing example of both cases.

Figure 17. Read Timing Example: (1) Single Pulse, (2) Hold Signal High After Last Rising Edge

The LMP91300 goes into transmit mode 10μs plus a symbol length after the IDLE rising edge and no longer accepts any data until transmission is done. The master is not allowed to send anything until the slave has finished sending the data. Data is always written back on a read command with an IDLE bit, 8 bytes of data, and another IDLE bit. All transmitting is done in 8 byte blocks with the exception that only one byte is transmitted when the STATUS register (0x7E) is read. Since data transfer is always 8 bytes maximum (except for when register 0x7E, STATUS is read), there is a maximum wait time (8 bits*8 bytes + IDLE + IDLE + 10us) that the master must wait before taking ownership of the bus. The amount of time it takes for SWIF to switch from input to output is about one symbol.

Figure 18. Complete Frame For A Read Command

The user has the option to set the LMP91300 into a read-only mode or SWIF disabled mode. When placed in read-only mode, the SWIF can only be used to read back the registers but all write capability is disabled. When placed in SWIF disabled mode, both read and write capabilities are disabled.

7.5.3 Usage Priority Of Registers

When a LMP91300 is powered on the register values that are used depends on if the LMP91300 has had values burned into the registers. See register 0x7F, BURN_REQ.

1. No values have been burned into registers:
   1. When powered on the LMP91300 will use the default values in registers 0x00-0x5D and 0x66-0x72.
   2. If a value is written to any of these registers (0x00-0x5D and 0x66-0x72) the LMP91300 will use the value written instead of the power on default value.
   3. If a value is written into a FNL register (0x73-0x78) the LMP91300 will continue to use the value in the INIT register instead of the corresponding FNL register. For example, if register OSC_CONFIG_3_FNL (0x77) has a value written to it, the LMP91300 will continue using the OSC_CONFIG_3_INIT (0x71) register and not use the value in the OSC_CONFIG_3_FNL (0x77) register.
   4. If the LMP91300 is powered off and back on it will use the default values in registers 0x00-0x5D and 0x66-0x72.
2. Values have been burned into the LMP91300 memory using burn request 0x08.
   1. When powered on the LMP91300 will use the burned values in registers 0x00-0x5D and 0x66-0x72.
   2. If a value is written to any of these registers (0x00-0x5D and 0x66-0x72) the LMP91300 will use the written value instead of the burned value.
   3. If a value is written into a FNL register (0x73-0x78) the LMP91300 will continue to use the value in the INIT register instead of the corresponding FNL register. For example, if register OSC_CONFIG_3_FNL (0x77) has a value written to it, the LMP91300 will continue using the OSC_CONFIG_3_INIT (0x71) register and not use the value in the OSC_CONFIG_3_FNL (0x77) register.
   4. If the LMP91300 is powered off and back on the LMP91300 will use the burned values in registers 0x00-0x5D and 0x66-0x72.
3. Values have been burned into the LMP91300 memory using burn request 0x10 or 0x20.
   1. When powered on the LMP91300 will use the burned values in registers 0x00-0x5D, 0x6A-0x70 and 0x73-0x78.
   2. If a value is written to an INIT register (0x66-0x69, 0x71-0x72) it will be ignored and the corresponding FNL register (0x73-0x78) will be used.
   3. If a value is written to a FNL register (0x73-0x78) the LMP91300 will use the written value instead of the burned value.
   4. If the LMP91300 is powered off and then back on the LMP91300 will use the burned values in registers 0x00-0x5D, 0x6A-0x70 and 0x73-0x78.

It is important to remember that the LMP91300 will always use the values in the initial registers (either temporary written values or permanently burned values) if the final registers have not had values burned into them. If the final registers have had values burned into them, the LMP91300 will always use the final registers (either the permanently burned value or a value that has been temporally written in a final register).

The burn status of the LMP91300 can be determined by reading the STATUS register (0x7E) as long as a 0x80 burn request has not been issued.

Each register can only have a value burned into it one time. It is not possible to burn a value into a register multiple times.

7.6.1 DET_H_MSB_INIT – Detection High Threshold MSB (Initial) (Address 0x66)

7.6.2 DET_H_LSB_INIT – Detection High Threshold LSB (Initial) (Address 0x67)

7.6.3 DET_L_MSB_INIT – Detection Low Threshold MSB (Initial) (Address 0x68)

7.6.4 DET_L_LSB_INIT – Detection Low Threshold LSB (Initial) (Address 0x69)

7.6.5 INFO0 – Device Information 0 (Address 0x6A)

7.6.6 INFO1 – Device Information 1 (Address 0x6B)

7.6.7 INFO2 – Device Information 2 (Address 0x6C)

7.6.8 INFO3 – Device Information 3 (Address 0x6D)

7.6.9 OSC_CONFIG_0 – Oscillator Configuration 0 Register (Address 0x6E)

7.6.10

7.6.11 OSC_CONFIG_1 – Oscillator Configuration 1 Register (Address 0x6F)

7.6.12 OSC_CONFIG_2 – Oscillator Configuration 2 Register (Address 0x70)

7.6.13 OSC_CONFIG_3_INIT – Oscillator Configuration 3 Register (Initial) (Address 0x71)

7.6.14 OUT_CONFIG_INIT – Output Configuration Register (Initial) (Address 0x72)

7.6.15 DET_H_MSB_FNL – Detection High Threshold MSB (Final) (Address 0x73)

7.6.16 DET_H_LSB_FNL – Detection High Threshold LSB (Final) (Address 0x74)

7.6.17 DET_L_MSB_FNL – Detection Low Threshold MSB (Final) (Address 0x75)

7.6.18 DET_L_LSB_FNL – Detection Low Threshold LSB (Final) (Address 0x76)

7.6.19 OSC_CONFIG_3_FNL – Oscillator Configuration 3 Register (Final) (Address 0x77)

7.6.20 OUT_CONFIG_FNL – Output Configuration Register (Final) (Address 0x78)

7.6.21 TEMP64 – Temperature In °C + 64 (Address 0x79)

7.6.22 PROXIMITY_MSB – Proximity MSB (Address 0x7A)

7.6.23 PROXIMITY_LSB – Proximity LSB (Address 0x7B)

7.6.24 STATUS – Device Status (Address 0x7E)

7.6.25 BURN_REQ – Burn Request (Address 0x7F)