SN74AVCH8T245 8 ビット、デュアル電源バス・トランシーバ、可変レベル変換/3 ステート出力 |

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8 ビット、デュアル電源バス・トランシーバ、可変レベル変換/3 ステート出力



  • SN74AXCH8T245  -  ピン互換の新しい 8 ビット・バス・ホールド・レベル・シフタ


The SN74AVCH8T245 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from either the A bus to the B bus, or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCH8T245 is designed so that the control pins (DIR and OE) are referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device.

The VCC isolation feature ensures that if either VCCA or VCCB is at GND, then the outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

The SN74AVCH8T245 solution is compatible with a single-supply system and can be replaced later with a ’245 function, with minimal printed circuit board redesign.

To ensure the high-impedance state during power up or power down, OE shall be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.


  • Control Inputs (DIR and OE) VIH and VIL Levels Are Referenced to VCCA Voltage
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • VCC Isolation Feature
  • Fully Configurable Dual-Rail Design
  • I/Os Are 4.6-V Tolerant
  • Ioff Supports Partial-Power-Down Mode Operation
  • Max Data Rates:
    • 320 Mbps (VCCA ≥ 1.8 V and VCCB ≥ 1.8 V)
    • 170 Mbps (VCCA ≤ 1.8 V or VCCB ≤ 1.8 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)


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Part number オーダー・オプション Technology Family Application Bits (#) High input voltage (Min) (Vih) High input voltage (Max) (Vih) Output voltage (Min) (V) Output voltage (Max) (V) IOH (Max) (mA) IOL (Max) (mA) Package Group Rating
SN74AVCH8T245 ご注文 AVC       8     1.2     3.6     1.2     3.6     -12     12     TSSOP | 24
TVSOP | 24
VQFN | 24    
SN74AVC8T245 ご注文 AVC       8     0.78     3.6     1.2     3.6     -12     12     TSSOP | 24
TVSOP | 24
VQFN | 24    
SN74AVC8T245-Q1 ご注文 AVC       8     0.78     3.6     1.2     3.6     -12     12     TSSOP | 24
VQFN | 24    
SN74AVCH16T245 ご注文 AVC       16     1     3.6     1.2     3.6     -12     12     TSSOP | 48
TVSOP | 48    
SN74AVCH1T45 ご注文 AVC     GPIO     1     1     3.6     1.2     3.6     -12     12     DSBGA | 6
SC70 | 6
SOT-23 | 6    
SN74AVCH20T245 ご注文 AVC       20     0.8     3.6     1.2     3.6     -12     12     TSSOP | 56
TVSOP | 56    
SN74AVCH2T45 ご注文 AVC     GPIO