SN74LS138 3 ライン to 8 ライン デコーダ/デマルチプレクサ | TIJ.co.jp

SN74LS138
この製品はすでに市場にリリースされており、ご購入できます。 一部の製品は、より新しい代替品を使用できる可能性があります。
3 ライン to 8 ライン デコーダ/デマルチプレクサ

3 ライン to 8 ライン デコーダ/デマルチプレクサ - SN74LS138
データシート
 

概要

These Schottky-clamped TTL MSI circuits are designed to be used in high-performance memory decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the Schottky-clamped system decoder is negligible.

The 'LS138, SN54S138, and SN74S138A decode one of eight lines dependent on the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

All of these decoder/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and to simplify system design.

The SN54LS138 and SN54S138 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS138 and SN74S138A are characterized for operation from 0°C to 70°C.

 

特長

  • Designed Specifically for High-Speed:
    • Memory Decoders
    • Data Transmission Systems
  • 3 Enable Inputs to Simplify Cascading and/or Data Reception
  • Schottky-Clamped for High Performance

 

機能一覧

他の製品と比較 エンコーダ / デコーダ メール Excelへダウンロード
Part number オーダー・オプション Function Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) Configuration Type IOL (Max) (mA) IOH (Max) (mA) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Bits (#) Digital input leakage (Max) (uA) ESD CDM (kV) ESD HBM (kV)
SN74LS138 ご注文 Decoder
Demultiplexer    
LS     4.75     5.25     1     5     35     10     41     3:8     Standard     8     -0.4     Catalog     0 to 70     PDIP | 16
SOIC | 16
SO | 16    
16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)
16SO: 80 mm2: 7.8 x 10.2 (SO | 16)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)    
8     5     0.75     2    
SN54LS138 サンプルは利用できません。 Decoder/Demultiplexer     LS     4.5     5.5     1     5     35     10     41     3:8     Standard     8/-0.4       Military     -55 to 125     CDIP | 16
CFP | 16
LCCC | 20    
16CDIP: 135 mm2: 6.92 x 19.56 (CDIP | 16)
16CFP: 69 mm2: 6.73 x 10.3 (CFP | 16)
20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20)    
8     5     0.75     2