TLC555-Q1
- Qualified for Automotive Applications
- Very Low Power Consumption
- 1 mW (Typical) at VDD = 5 V
- Capable of Operation in Astable Mode
- CMOS Output Capable of Swinging Rail to Rail
- High-Output-Current Capability
- Sink 100 mA (Typical)
- Source 10 mA (Typical)
- Output Fully Compatible With CMOS, TTL, and
MOS - Low Supply Current Reduces Spikes During
Output Transitions - Single-Supply Operation From 2 V to 15 V
- Functionally Interchangeable With the NE555;
Has Same Pinout
The TLC555-Q1 is a monolithic timing circuit fabricated using the TI LinCMOS™ process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power-supply voltage.
Like the NE555, the TLC555-Q1 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT).
When the trigger input (TRIG) falling below the trigger level sets the flip-flop, and the output goes high. Having TRIG above the trigger level and the threshold input (THRES) above the threshold level resets the flip-flop, and the output is low. The reset input (RESET) can override all other inputs, and a possible use is to initiate a new timing cycle. RESET going low resets the flip-flop, and the output is low. Whenever the output is low, a low-impedance path exists between the discharge terminal (DISCH) and GND. Tie all unused inputs to an appropriate logic level to prevent false triggering.
The advantage of the TLC555-Q1 is that it exhibits greatly reduced supply-current spikes during output transitions. Although the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the main reason the TLC555-Q1 is able to have low current spikes is due to its edge rates. This minimizes the need for the large decoupling capacitors required by the NE555.
The TLC555-Q1 is characterized for operation over the full automotive temperature range of 40°C to 125°C.
技術資料
種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
---|---|---|---|---|---|---|
* | データシート | TLC555-Q1 LinCMOS™ TIMER データシート (Rev. B) | PDF | HTML | 2015年 8月 28日 | ||
機能安全情報 | TLC555-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA (Rev. A) | PDF | HTML | 2023年 3月 13日 | |||
技術記事 | Power Tips: Multiply your output voltage | PDF | HTML | 2016年 7月 20日 | |||
設計ガイド | EMC Compatible Automotive LED Rear Lamp Sequential-Turn Animation Design Guide | 2016年 6月 2日 | ||||
アプリケーション・ノート | TLC555-Q1 Used as a Positive and Negative Charge Pump | 2016年 5月 25日 |
設計と開発
その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。
TLC555 TINA-TI Astable Reference Design (Rev. B)
TLC555 TINA-TI Mono Reference Design (Rev. B)
PSPICE-FOR-TI — TI Design / シミュレーション・ツール向け PSpice®
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パッケージ | ピン数 | ダウンロード |
---|---|---|
SOIC (D) | 8 | オプションの表示 |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 材質成分
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点
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