SLVSA55B November   2009  – November 2016 TPD4S1394

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Detailed Description

7.1 Overview

TPD4S1394 is a FireWire interface part that complies to the IEEE 1394 standard. The device has ESD protection for four high-speed data lines that pass 6-kV IEC61000-4-2 standard. Each dataline's I/O capacitance associated with the ESD cell is minimal and supports high data rate. There is a live insertion detection circuit integrated in TPD4S1394. During the live insertion event if there is a floating GND or a high-level signal at D+ or D–, the FWPWR_EN is driven low, disabling the external FireWire power switch.

7.2 Functional Block Diagram

TPD4S1394 fbd_lvsa55.gif

7.3 Feature Description

TPD4S1394's high-speed ESD cells on the data lines protect the pins from up to ±6-kV IEC 61000-4-2 contact discharge. The live insertion protection circuit detects improper voltages on the data lines and turn off the FireWire port power switch during an abnormal condition.

7.4 Device Functional Modes

The TPD4S1394's D1+, D1–, D2+, and D2– pins are a passive-integrated circuit that activates when voltages exceed the forward voltage plus VCLMP or fall below the lower diodes forward voltage (–0.6 V). VCC must be within recommended voltage range for live insertion detection circuit to work correctly.