UCC21320-Q1
- 4-A peak source, 6-A peak sink output
- 3-V to 18-V input VCCI range to interface with both digital and analog controllers
- Up to 25-V VDD output drive supply
- Switching parameters:
- 19-ns typical propagation delay
- 10-ns minimum pulse width
- 5-ns maximum delay matching
- 6-ns maximum pulse-width distortion
- Common-mode transient immunity (CMTI) greater than 100 V/ns
- Universal: dual low-side, dual high-side or half-bridge driver
- Programmable overlap and dead time
- Wide Body SOIC-14 (DWK) Package
- 3.3mm spacing between driver channels
- Operating temperature range –40 to +125°C
- Surge immunity up to 12.8 kV
- Isolation barrier life >40 years
- TTL and CMOS compatible inputs
- Rejects input pulses and noise transients shorter than 5 ns
- Fast disable for power sequencing
- Qualified for automotive applications
- AEC-Q100 qualified with the following results
- Device temperature grade 1
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
The UCC21320-Q1 is an isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.
The input side is isolated from the two output drivers by a 3.75-kVRMS basic isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.
Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.
Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC21320-Q1 enables high efficiency, high power density, and robustness.
技術資料
種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
---|---|---|---|---|---|---|
* | データシート | UCC21320-Q1 4-A, 6-A, 3.75-kVRMS Isolated Dual-Channel Gate Driver for Automotive データシート | PDF | HTML | 2019年 8月 28日 | ||
アプリケーション概要 | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 2021年 12月 16日 | |||
EVM ユーザー ガイド (英語) | Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) | PDF | HTML | 2021年 10月 21日 |
設計と開発
その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。
PSPICE-FOR-TI — TI Design / シミュレーション・ツール向け PSpice®
設計とシミュレーション向けの環境である PSpice for TI (...)
パッケージ | ピン数 | ダウンロード |
---|---|---|
SOIC (DWK) | 14 | オプションの表示 |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 材質成分
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点
推奨製品には、この TI 製品に関連するパラメータ、評価基板、またはリファレンス デザインが存在する可能性があります。