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UCC27518A-Q1

アクティブ

車載、5V UVLO とイネーブル搭載、反転 CMOS 入力、4A/4A、シングルチャネル・ゲート・ドライバ

製品詳細

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 125 Rise time (ns) 8 Fall time (ns) 7 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 125 Rise time (ns) 8 Fall time (ns) 7 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Inverting
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Automotive Qualified Grade 1: –40°C
      to +125°C Ambient Operating Temperature
      Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • Pin-to-Pin Compatible With TI’s TPSS2828-Q1
    and the TPS2829-Q1
  • 4-A Peak Source and 4-A Peak Sink Symmetrical
    Drive
  • Fast Propagation Delays (17-ns typical)
  • Fast Rise and Fall Times (8-ns and 7-ns typical)
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power-Up and Power-
    Down)
  • CMOS Input Logic Threshold (Function of Supply
    Voltage With Hysteresis)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • EN Pin for Enable Function (Allowed to be no
    Connect)
  • Ability to Support Negative Voltages (–5 V) at
    Input and Enable pins
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV Package (SOT-23)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Automotive Qualified Grade 1: –40°C
      to +125°C Ambient Operating Temperature
      Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • Pin-to-Pin Compatible With TI’s TPSS2828-Q1
    and the TPS2829-Q1
  • 4-A Peak Source and 4-A Peak Sink Symmetrical
    Drive
  • Fast Propagation Delays (17-ns typical)
  • Fast Rise and Fall Times (8-ns and 7-ns typical)
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power-Up and Power-
    Down)
  • CMOS Input Logic Threshold (Function of Supply
    Voltage With Hysteresis)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • EN Pin for Enable Function (Allowed to be no
    Connect)
  • Ability to Support Negative Voltages (–5 V) at
    Input and Enable pins
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV Package (SOT-23)

The UCC2751xA-Q1 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC2751xA-Q1 family of devices sources and sinks high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 17 ns.

The UCC2751xA-Q1 family of devices provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC2751xA-Q1 family of devices operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power-semiconductor devices.

The input pin threshold of the UCC2751xA-Q1 family of devices is based on CMOS logic where the threshold voltage is a function of the VDD supply voltage. Typically, the input high threshold (VIN–H) is 55% VDD and the input low threshold (VIN–L) is 39% VDD. Wide hysteresis (16% VDD typically) between the high and low thresholds offers excellent noise immunity and allows users to introduce delays using RC circuits between the input PWM signal and the INx pin of the device.

The UCC2751xA-Q1 family of devices also features a floatable enable function on the EN pin. The EN pin can be left in a no-connect condition, which allows pin-to-pin compatibility between the UCC2751xA-Q1 family of devices and the TPS2828-Q1 or TPS2829-Q1 device, respectively. The enable pin threshold is a fixed voltage threshold and does not vary based on VDD pin bias voltage. Typically, the enable high threshold (VEN-H) is 2.1 V and the enable low threshold (VEN-L) is 1.25 V.

The UCC2751xA-Q1 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC2751xA-Q1 family of devices sources and sinks high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 17 ns.

The UCC2751xA-Q1 family of devices provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC2751xA-Q1 family of devices operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power-semiconductor devices.

The input pin threshold of the UCC2751xA-Q1 family of devices is based on CMOS logic where the threshold voltage is a function of the VDD supply voltage. Typically, the input high threshold (VIN–H) is 55% VDD and the input low threshold (VIN–L) is 39% VDD. Wide hysteresis (16% VDD typically) between the high and low thresholds offers excellent noise immunity and allows users to introduce delays using RC circuits between the input PWM signal and the INx pin of the device.

The UCC2751xA-Q1 family of devices also features a floatable enable function on the EN pin. The EN pin can be left in a no-connect condition, which allows pin-to-pin compatibility between the UCC2751xA-Q1 family of devices and the TPS2828-Q1 or TPS2829-Q1 device, respectively. The enable pin threshold is a fixed voltage threshold and does not vary based on VDD pin bias voltage. Typically, the enable high threshold (VEN-H) is 2.1 V and the enable low threshold (VEN-L) is 1.25 V.

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技術資料

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート UCC2751xA-Q1 Single-Channel High-Speed Low-Side Gate Driver With Negative Input Voltage Capability データシート (Rev. B) PDF | HTML 2014年 8月 31日
機能安全情報 UCC27517A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 2021年 6月 16日
アプリケーション概要 External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
アプリケーション概要 Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
その他の技術資料 Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日

設計と開発

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SOT-23 (DBV) 5 オプションの表示

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 材質成分
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブの拠点
  • 組み立てを実施した拠点

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