レーダ - 前方遠距離レーダ

テキサス・インスツルメンツの 77GHz レーダー・ソリューション

設計上の考慮事項

Processing –DSP/ Application Processor

Design Requirements:
  • Heterogeneous, scalable architecture (Suitable for broad range of ADAS applications)
  • Reduced system software complexity and intensive radar processing for collision avoidance algorithms (FFTs)
  • High precision, wide dynamic range
  • Multiple object detection, differentiation and tracking
  • High memory bandwidth for digital radar applications (Storage of a large amount of raw radar data)
  • Low power dissipation and complex ADAS radar analytics
  • Small size
  • Increased system robustness and reliability
Features:
  • Provides optimal mix of performance, low power and ADAS vision analytics
  • Dual-core ARM Cortex A15 RISC CPUs with Neon extension
  • Mixture of fixed and floating-point C66x DSP cores
  • Up to 16 RX antenna
  • Up to 2.5MB of on-chip L3 RAM
  • Multiple embedded vision engines (EVEs) provide highly efficient radar analytics for real-time radar based automotive applications at the same power levels
  • Integration of peripherals – multi-camera interfaces, display, CAN, and Gigabit Ethernet AVB enables AEC-Q100 qualified

Processing -Safety MCU

Design Requirements:
  • Cycle by cycle CPU fail safe detection
  • Support ISO26262, ASIL-D
  • Higher bandwidth networking for existing and evolving automotive protocols
  • Developed to safety standards / Systematic and random fault detection
  • ARM-based: Enables re-usage of already developed software and ensures the possibility of future re-usage of software investments/IP
  • Environmentally induced failure
  • Enables standardization of basic automotive system functions-supports AUTOSAR
Features:
  • Dual core lock-step safety micro controller
  • Cortex-R over 280 DMIPs
  • Ethernet, CAN, LIN/UART and FlexRay connectivity
  • Integrated features that meet ISO 26262 ASIL-D and IEC 61508 SIL-3 safety standards
  • AEC-Q100 Grade 1 qualified
  • Floating-point capabilities, very interesting for signal processing
  • AEC-Q100 qualified

Power – ECU Power Supply

Design Requirements:
  • Wide supply voltage range (Directly connected to battery line)
  • Low power dissipation
  • Electro-magnetic compatibility (EMC)
  • Small solution size
  • Increased system robustness and reliability
Features:
  • Wide Vin 3.5V – 36V survives cold-crank, start-stop, & load dump conditions
  • Adjustable and fixed voltage versions available and integrated feedback resistors
  • Highly efficient synchronous and non-synchronous DC/DC converters and controllers
  • Fixed or synchronizable frequency >2Mhz
  • Operation with few external components and easy to use
  • AEC-Q100 qualified

Power – RF Supply

Design Requirements:
  • Output noise
  • DC/DC switching harmonics
  • Stable and precise out voltage with good thermal
  • Fast transient
  • Small size
  • Increased system robustness and reliability
Features:
  • Low Noise: Down to 23.5uVrms typical (100Hz to 100KHz)
  • High PSRR over wide-bandwidth (80dB at 1KHz, 60dB at 100KHz, 54dB at 1MHz)
  • High accuracy of 3% over load, line, process and temp variations
  • Fast start-up time (50us)
  • 3X3mm SON-8 package
  • AEC-Q100 qualified

Power - Safety Power Management IC

Design Requirements:
  • Enable Functional Safety on system level
  • Support wide supply voltage range (off battery operation) High level of power integration to achieve small form factor
  • Obsoleting 2nd saving MCU
  • Low quiescent current
  • Increased system robustness and reliability
Features:
  • Power supplies with integrated Window or Q&A watchdog, Lock-Step error monitoring as well as diagnostic features such as build in self-test to detect device malfunctioning and consequently provide signaling or the disabling of system functions.
  • Power supply covering car battery voltage range
  • Integrated power solutions requiring few external components, switching frequencies >2MHz allow for small passive components and overall reduce design complexity
  • Minimizing board space and software development effort and verification
  • Highly efficient DC/DC SMPS as pre-regulator in combination with space saving LDOs
  • AEC-Q100 qualified

Signal Chain – Integrated Base Band AFE (AFE5401-Q1)

Design Requirements:
  • Board space, total power consumption and cost limitations dictate device size
  • Longer detection range and accuracy with multiple object detection
  • High resolution, accurate recognition and differentiation of stationary and fast moving objects
  • Increased # of channels possible per system without increasing power budget
  • High PSRR to eliminate spurs (50nV/rtHz noise (10K-20Mhz) for RF
  • High-speed, high-bandwidth interface to DSP for processing
  • AEC-Q100 qualified
Features:
  • Fully integrated quad channel LNA, PGA, ADC+ 4 aux channels
  • LNA (12-18dB), equalizer/AAF and 30dB PGA
  • Quad 12bit 25MSPS ADCs
  • Total power per channel: 65mW
  • Input noise: 3.5nV/rtHz
  • 100MHz CMOS glue-less interface to DSP
  • AEC-Q100 qualified

Signal Chain – RF PLL with Chirp Generator (LMX2492-Q1)

Design requirements:
  • Highest possible noise performance to improve RF sensitivity and radar accuracy: avoiding false alarms and detecting smaller objects
  • High level of integration to eliminate the effort and risks of external ramp generators, charge pumps or LDOs, also minimizing jitter
  • Wide operating range of up to 14 GHz VCO to reduce the number of external frequency multipliers and achieve the best possible signal quality
  • High performance phase frequency detection supports finer and more linear ramp resolution
  • Broadly configurable ramp generation assists in reducing signal interference from other radar systems
  • Range of over 200m enables automatic emergency braking for speeds of more than 120 mph (200km/h)
Features:
  • Ultra low PLL phase noise ( -227 dBc/Hz)
  • Wider Operating range (500 MHz to 13.5 GHz)
  • Programmable ramp parameters and triggering
  • Ramp frequency monitor (read back)
  • Supports Sawtooth, Triangular and Custom ramping types
  • Programmable ramp time (from 20us to 100us)
  • Step per ramp (up to 13000)
  • Phase Frequency Detection up to 200 MHz
  • Ultra-low power (< 65 mA @ 3.3 V)
  • Advanced Delta Sigma Fractional Compensation
  • Fast Settling Mode
  • Digital lock detect
  • AEC-Q100 qualified

セレクション/ソリューション・ガイド

ソリューション・ガイド (2)

タイトル 概要 種類 サイズ (KB) 日付 表示回数 英語版
PDF 1.35 MB 2016年 6月 1日 5815
PDF 6.58 MB 2016年 1月 18日 0 最新の英語版をダウンロード (Rev.B)

製品カタログ/ホワイト・ペーパー

ホワイト・ペーパー (4)

タイトル 概要 種類 サイズ (MB) 日付 表示回数 英語版
PDF 772 KB 2015年 8月 28日 1711
PDF 1021 KB 2013年 10月 24日 809
PDF 2.35 MB 2013年 10月 16日 497
PDF 271 KB 2013年 10月 13日 597

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