使用許可、知的財産権、免責事項に関する TI デザインのご注意を表示
主なドキュメント
- TID
(PDF 1281 KB)
2016年 3月 18日 238 回表示 (英語)
- 技術資料をすべて表示 (5)
概要
The TIDEP0067 TI Reference Design is based on the 66AK2G02 multicore System-on-Chip (SoC) processor and companion TPS659118 power management integrated circuit (PMIC) which includes power supplies and power sequencing for the 66AK2G02 processor in a single device. This power solution design also includes the first stage buck converters to support a 12 V input and the DDR termination regulator for DDR3L memory. The reference design is tested and includes hardware reference (EVM), software (Processor SDK) and test data.
特長
- TPS54620 and TPS54429 first stage buck converters
- TPS659118 companion PMIC supporting power sequencing and power supplies as required by K2G
- Integrated real time clock (RTC) for time-critical applications via the TPS659118
- LP2996A DDR3L termination regulator
使用許可、知的財産権、免責事項に関する TI デザインのご注意を表示