SBFS031F February   2006  – September 2016 DIX4192

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 RESET Operation
      2. 9.3.2 Master and Reference Clocks
      3. 9.3.3 Audio Serial Port Operation
      4. 9.3.4 Overview of the AES3 Digital Audio Interface Protocol
      5. 9.3.5 Digital Interface Transmitter (DIT) Operation
      6. 9.3.6 Digital Interface Receiver (DIR) Operation
      7. 9.3.7 General-Purpose Digital Outputs
      8. 9.3.8 Interrupt Output
    4. 9.4 Device Functional Modes
      1. 9.4.1 Host Interface Operation: Serial Peripheral Interface (SPI) Mode
      2. 9.4.2 Host Interface Operation: PHILIPS I2C Mode
    5. 9.5 Register Maps
      1. 9.5.1 Register and Data Buffer Organization
      2. 9.5.2 Control Registers
        1. 9.5.2.1 Registers 1F through 28: Q-Channel Sub-Code Data Registers
        2. 9.5.2.2 Registers 29 through 2C: IEC61937 PC/PD Burst Preamble
      3. 9.5.3 Channel Status and User Data Buffer Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Digital Audio Transformer Vendors
      2. 10.1.2 Receiver Input Interfacing
      3. 10.1.3 Transmitter Output Interfacing
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Differential Line Inputs and Output
        2. 10.2.2.2 Serial Ports
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Digital Audio Interface Transmitter (DIT)
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and
      CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392

2 Applications

  • Digital Audio Recorders and Mixing Desks
  • Digital Audio Interfaces for Computers
  • Digital Audio Routers and Distribution Systems
  • Broadcast Studio Equipment
  • DVD and CD Recorders
  • Surround Sound Decoders and A/V Receivers
  • Car Audio Systems

3 Description

The DIX4192 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DIX4192 TQFP (48) 7.00 mm × 7.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

DIX4192 Typical Application

DIX4192 typ_app_dix4192.gif

4 Revision History

Changes from E Revision (April 2016) to F Revision

  • Changed fMCLK Max value From: 2.27 To: 27.7 Go

Changes from D Revision (January 2016) to E Revision

Changes from C Revision (June 2006) to D Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go