SDLS966J December   2013  – April 2020 LSF0101 , LSF0102 , LSF0108

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: LSF0101, LSF0108
    5. 6.5  Thermal Information: LSF0102
    6. 6.6  Electrical Characteristics
    7. 6.7  LSF0101/02 AC Performance (Translating Down) Switching Characteristics , VGATE = 3.3 V
    8. 6.8  LSF0108 AC Performance (Translating Down) Switching Characteristics, VGATE = 3.3 V
    9. 6.9  LSF0101/02 AC Performance (Translating Down) Switching Characteristics, VGATE = 2.5 V
    10. 6.10 LSF0108 AC Performance (Translating Down) Switching Characteristics, VGATE = 2.5 V
    11. 6.11 LSF0101/02 AC Performance (Translating Up) Switching Characteristics, VGATE = 3.3 V
    12. 6.12 LSF0108 AC Performance (Translating Up) Switching Characteristics, VGATE = 3.3 V
    13. 6.13 LSF0101/02 AC Performance (Translating Up) Switching Characteristics, VGATE = 2.5 V
    14. 6.14 LSF0108 AC Performance (Translating Up) Switching Characteristics, VGATE = 2.5 V
    15. 6.15 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Auto Bidirectional Voltage Translation
      2. 8.3.2 Output Enable
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Open-Drain Interface (I2C, PMBus, SMBus, GPIO)
        1. 9.2.1.1 Design Requirements
          1. 9.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Bidirectional Translation
          2. 9.2.1.2.2 Pull-up Resistor Sizing
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Mixed-Mode Voltage Translation
      3. 9.2.3 Voltage Translation for Vref_B < Vref_A + 0.8 V
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at
    ≤ 30pF cap load and up To 40-MHz up/down translation at 50pF cap load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low RON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C Operating temperature range