Design Goals

Design Description

This low-side voltage-to-current (V-I) converter delivers a well-regulated current to a load which can be connected to a voltage greater than the op amp supply voltage. The circuit accepts an input voltage from 0V to 10V and converts it to a current from 0A and 1A. The current is accurately regulated by feeding back the voltage drop across a low-side current-sense resistor (R₅) to the op amp.

Design Notes

1. Resistor divider (R1 and R2) is implemented to limit the maximum voltage at the non-inverting input, V_in+, and sense resistor, R₅, at full-scale.
2. For an op amp that is not rail-to-rail input (RRI), a voltage divider may be needed to reduce the input voltage to be within the common-mode voltage of the op amp.
3. Use low resistance values for R₅ to maximize load compliance voltage and reduce the power dissipated at full-scale.
4. Using a high-gain BJT reduces the output current requirement for the op amp.
5. Feedback components R₃, R₄, and C₁ provide compensation to ensure stability. R₃ isolates the input capacitance of the bipolar junction transistor (BJT), R₄ provides a DC feedback path directly at the current-setting resistor (R₅), and C₁ provides a high-frequency feedback path that bypasses the BJT.
6. Use the op amp in a linear operating region. Linear output swing is usually specified under the A_OL test conditions in the device data sheet.

Design Steps

The transfer function of the circuit is:

1. Calculate the sense resistor, R₅. The sense resistor should be sized as small as possible to maximize the load compliance voltage and reduce power dissipation. Set the maximum voltage across the sense resistor to 100mV. Limiting the voltage drop to 100mV limits the power dissipated in the sense resistor to 100mW at full-scale output.
   ${\text{Let V}}_{\text{in-(max)}}{\text{= 100mV at I}}_{\text{oMax}}\text{= 1A}$
   ${\text{R}}_{\text{5}}=\frac{{\text{V}}_{\text{in-(max)}}}{{\text{I}}_{\text{oMax}}}=\frac{\text{100mV}}{\text{1A}}\text{= 100mΩ}$
2. Select resistors, R₁ and R₂, for the voltage divider at the input. At the maximum input voltage, the voltage divider should reduce the input voltage to the op amp, V_in+(max), to the maximum voltage across the sense resistor, R₅. R₁ and R₂ should be chosen such that the maximum input current is not exceeded.
   ${\text{V}}_{\text{in-(max)}}{\text{= V}}_{\text{in+(max)}}{\text{= I}}_{\text{iMax}}{\text{× R}}_{\text{2}}\text{= 100mV}$
   ${\text{R}}_{\text{2}}=\frac{{\text{V}}_{\text{in+(max)}}}{{\text{I}}_{\text{iMax}}}\text{=}\frac{\text{100mV}}{\text{200µA}}\text{= 500Ω ∼ 499Ω (Standard value)}$
   ${\text{V}}_{\text{in+(max)}}{\text{= V}}_{\text{iMax}}\text{×}\left(\frac{R_2}{R_1+R_2}\right)$
   $$R1 = 49.5kΩ ~ 49.3kΩ (Standard value)
3. See the Design References section [3] for the design procedure on how to properly size the compensation components, R₃, R₄, and C₁.

Design Simulations

DC Simulation Results

AC Simulation Results

Transient Simulation Results

Design References

1. See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
2. SPICE Simulation File: SBOMB58.
3. TI Precision Labs

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