SNAS513F August   2011  – November 2015 LM48560

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics VDD = 3.6 V
    5. 6.5 I2C Interface Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 General Amplifier Function
      2. 8.3.2 Class H Operation
      3. 8.3.3 Differential Amplifier Explanation
      4. 8.3.4 Automatic Level Control (ALC)
      5. 8.3.5 Attack Time
      6. 8.3.6 Release Time
      7. 8.3.7 Boost Converter
      8. 8.3.8 Gain Setting
      9. 8.3.9 Shutdown Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Software or Hardware Mode
      2. 8.4.2 Single-Ended Input Configuration
    5. 8.5 Programming
      1. 8.5.1 Read/Write I2C Compatible Interface
      2. 8.5.2 Write Sequence
      3. 8.5.3 Read Sequence
    6. 8.6 Register Maps
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Proper Selection of External Components
          1. 9.2.2.1.1 ALC Timing (CSET) Capacitor Selection
          2. 9.2.2.1.2 Power Selection of External Components
          3. 9.2.2.1.3 Boost Converter Capacitor Selection
          4. 9.2.2.1.4 Inductor Selection
          5. 9.2.2.1.5 Diode Selection
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Class H Topology
  • Integrated Boost Converter
  • Bridge-Tied Load (BTL) Output
  • Selectable Differential Inputs
  • Selectable Control Interfaces
    • (Hardware or Software mode)
  • I2C Programmable ALC
  • Low Supply Current
  • Minimum External Components
  • Micro-Power Shutdown
  • Available in Space-Saving DSBGA Package
  • Key Specifications:
    • Output Voltage at VDD = 3.6 V,
      RL = 1.5 μF + 10 Ω, THD+N ≤ 1%
      • 30 VP-P (Typical)
    • Quiescent Power Supply Current
      at 3.6 V (ALC Enabled)
      • 4 mA (Typical)
    • Power Dissipation at 25 VP-P, 1 W (Typical)
    • Shutdown Current, 0.1 μA (Typical)

2 Applications

  • Touch Screen Smart Phones
  • Tablet PCs
  • Portable Electronic Devices
  • MP3 Players

3 Description

The LM48560 device is a high voltage, high efficiency, Class H driver for ceramic speakers and piezo actuators. The LM48560 device’s Class H architecture offers significant power savings compared to traditional Class AB amplifiers. The device provides 30 VP-P output drive while consuming just 4 mA of quiescent current from a 3.6 V supply.

The LM48560 device features TI’s unique automatic level control (ALC) that provides output limiter functionality. The LM48560 device features two fully differential inputs with separate gain settings, and a selectable control interface. In software control mode, the gain control and device modes are configured through the I2C interface. In hardware control mode, the gain and input mux are configured through a pair of logic inputs.

The LM48560 device has a low power shutdown mode that reduces quiescent current consumption to 0.1 μA. The LM48560 device is available in an ultra-small 16–bump DSBGA package (1.97 mm × 1.97 mm).

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LM48560 DSBGA (16) 1.97 mm × 1.97 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

LM48560 30150733.gif

4 Revision History

Rev Date Description
1.0 08/16/11 Initial WEB released.
1.01 09/21/11 Input edits under CLASS H OPERATION.
1.02 11/01/11 Edited curves 30150753, 54, 55, 56, and Figure 26 (I2C Read Cycle).
1.03 11/10/11 Edited Figure 26.
1.04 07/25/12 Input texts/limits edits in the EC table.
1.05 08/22/12 Edited Table 1 and Table 2.
E 05/02/2013 Changed layout of National Data Sheet to TI format.
F 10/21/2015 Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.