JAJSOZ4
june 2023
TPS6521905
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
System Control Thresholds
6.6
BUCK1 Converter
6.7
BUCK2, BUCK3 Converter
6.8
General Purpose LDOs (LDO1, LDO2)
6.9
General Purpose LDOs (LDO3, LDO4)
6.10
GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO1, GPO2, GPIO, MODE/RESET, MODE/STBY, VSEL_SD/VSEL_DDR)
6.11
Voltage and Temperature Monitors
6.12
I2C Interface
6.13
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power-Up Sequencing
7.3.2
Power-Down Sequencing
7.3.3
Push Button and Enable Input (EN/PB/VSENSE)
7.3.4
Reset to SoC (nRSTOUT)
7.3.5
Buck Converters (Buck1, Buck2, and Buck3)
7.3.6
Linear Regulators (LDO1 through LDO4)
7.3.7
Interrupt Pin (nINT)
7.3.8
PWM/PFM and Low Power Modes (MODE/STBY)
7.3.9
PWM/PFM and Reset (MODE/RESET)
7.3.10
Voltage Select pin (VSEL_SD/VSEL_DDR)
7.3.11
General Purpose Inputs or Outputs (GPO1, GPO2, and GPIO)
7.3.12
I2C-Compatible Interface
7.3.12.1
Data Validity
7.3.12.2
Start and Stop Conditions
7.3.12.3
Transferring Data
7.4
Device Functional Modes
7.4.1
Modes of Operation
7.4.1.1
OFF State
7.4.1.2
INITIALIZE State
7.4.1.3
ACTIVE State
7.4.1.4
STBY State
7.4.1.5
Fault Handling
7.5
User Registers
7.6
Device Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Typical Application Example
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.3.1
Buck1, Buck2, Buck3 Design Procedure
8.2.3.2
LDO1, LDO2 Design Procedure
8.2.3.3
LDO3, LDO4 Design Procedure
8.2.3.4
VSYS, VDD1P8
8.2.3.5
Digital Signals Design Procedure
8.3
Multi-PMIC Operation
8.4
NVM Programming
8.4.1
TPS6521905 default NVM settings
8.4.2
NVM programming in Initialize State
8.4.3
NVM Programming in Active State
8.5
Application Curves
8.6
Power Supply Recommendations
8.7
Layout
8.7.1
Layout Guidelines
8.7.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RSM|32
MPQF195B
RHB|32
MPQF130D
サーマルパッド・メカニカル・データ
RSM|32
QFND112H
RHB|32
QFND676
発注情報
jajsoz4_oa
Data Sheet
3 個の降圧 DC/DC コンバータと 4 個の LDO を搭載した、ユーザー・プログラマブル・パワー・マネージメント IC (PMIC)