JAJSEY1 April 2019 ADC12DJ5200RF
ADVANCE INFORMATION for pre-production products; subject to change without notice.
The SDO signal provides the output data requested by a read command. This output is high impedance during write bus cycles and during the read bit and register address portion of read bus cycles.
As shown in Figure 22, each register access consists of 24 bits. The first bit is high for a read and low for a write.
The next 15 bits are the address of the register that is to be written to. During write operations, the last eight bits are the data written to the addressed register. During read operations, the last eight bits on SDI are ignored and, during this time, the SDO outputs the data from the addressed register. Figure 22 shows the serial protocol details.