8.6.57 DIG_BIND Register (Address = 0x216) [reset = 0x02]
DIG_BIND is shown in Figure 80 and described in Table 116.
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Digital Channel Binding (default: 0x02)
Figure 80. DIG_BIND Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
RESERVED |
DIG_BIND[1] |
DIG_BIND[0] |
R/W-0x0 |
R/W-0x1 |
R/W-0x0 |
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Table 116. DIG_BIND Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7:2 |
RESERVED |
R/W |
0x0 |
|
1 |
DIG_BIND[1] |
R/W |
0x1 |
Digital channel B input select:
0: Digital channel B receives data from ADC channel A
1: Digital channel B receives data from ADC channel B (default)
|
0 |
DIG_BIND[0] |
R/W |
0x0 |
Digital channel A input select:
0: Digital channel A receives data from ADC channel A (default)
1: Digital channel A receives data from ADC channel B
Note 1: When using single channel mode, you must always use the default setting for DIG_BIND or the device will not work.
Note 2: You must set JESD_EN=0 and CAL_EN=0 before changing DIG_BIND.
Note 3: The DIG_BIND setting is combined with PD_ACH/PD_BCH to determine if a digital channel is powered down. Each digital channel (and link) is powered down when the ADC channel it is bound to is powered down (by PD_ACH/PD_BCH).
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