JAJSEY1 April 2019 ADC12DJ5200RF
ADVANCE INFORMATION for pre-production products; subject to change without notice.
Fast frequency hopping (FFH) is made possible by each DDC having four independent NCOs that can be controlled by the NCOA0 and NCOA1 pins for DDC A and the NCOB0 and NCOB1 pins for DDC B. Each NCO has independent frequency settings (see the Basic NCO Frequency Setting Mode section) and initial phase settings (see the NCO Phase Offset Setting section) that can be set independently. Further, all NCOs have independent phase accumulators that continue to run when the specific NCO is not selected, allowing the NCOs to maintain their phase between selection so that downstream processing does not need to perform carrier recovery after each hop, for instance.
NCO hopping occurs when the NCO GPIO pins change state. The pins are controlled asynchronously and therefore synchronous switching is not possible. Associated latencies are demonstrated in Figure 9, where tTX and tADC are provided in the Switching Characteristics table. All latencies in Table 8 are approximations only.
|LATENCY PARAMETER||VALUE OR CALCULATION||UNITS|
|tGPIO-MIXER||~45 to ~68||tCLK cycles|
|tMIXER-TX||(tTX + tADC) – tADC-MIXER||tCLK cycles|