JAJSEY1 April 2019 ADC12DJ5200RF
ADVANCE INFORMATION for pre-production products; subject to change without notice.
The ADC12DJ5200RF can also be used as a single-channel ADC where the sampling rate is equal to two times the clock frequency (fS = 2 × fCLK) provided at the CLK+ and CLK– pins. This mode effectively interleaves the two ADC channels together to form a single-channel ADC at twice the sampling rate. This mode is chosen simply by setting JMODE to the appropriate setting for the desired configuration as described in Table 22. INA± or INB±, can serve as the input to the ADC, however INA± is recommended for highest performance. The analog input can be selected using SINGLE_INPUT (see the input mux control register).