JAJSGG2C October 2018 – June 2019 ADS125H02
The DOUT/DRDY pin is the serial interface data output. This pin also provides the conversion-data ready output. The function of the pin changes whether a read data (or read register) operation is in progress. With CS1 low and when not reading register or conversion data, the pin indicates when data are ready by asserting low. For conversion data and register read operations, the function changes to data output. When the read operation is completed, the function changes to conversion-data ready. As DOUT, the data are updated on the SCLK rising edge and the data must therefore be latched on the SCLK falling edge. CS1 must be low for DOUT/DRDY to provide the data-ready function. When both chip-select pins are high, DOUT/DRDY is in high-impedance mode (tri-state).