JAJSIU8B June 2015 – April 2020 ADS131E08S
Setting CHnSET[2:0] = 101 provides internally-generated test signals for use in sub-system verification at power-up. The test signals are controlled through register settings (see the CONFIG2: Configuration Register 2 section for details). TEST_AMP controls the signal amplitude and TEST_FREQ controls the switching frequency of the test signal. The test signals are multiplexed and transmitted out of the device at the TESTP and TESTN pins. The INT_TEST register bit (in theCONFIG2: Configuration Register 2 section) deactivates the internal test signals so that the test signal can be driven externally. This feature allows the test or calibration of multiple devices with the same signal.