SLUSAW3D December   2014  – January 2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Voltage
    6. 7.6  Supply Current
    7. 7.7  Power Supply Control
    8. 7.8  Low-Voltage General Purpose I/O (TSx)
    9. 7.9  High-Voltage General Purpose I/O (GPIO0, GPIO1)
    10. 7.10 AFE Power-On Reset
    11. 7.11 Internal 1.8-V LDO
    12. 7.12 Current Wake Comparator
    13. 7.13 Coulomb Counter
    14. 7.14 CC Digital Filter
    15. 7.15 ADC
    16. 7.16 ADC Digital Filter
    17. 7.17 ADC Multiplexer
    18. 7.18 Cell Balancing Support
    19. 7.19 Cell Detach Detection
    20. 7.20 Internal Temperature Sensor
    21. 7.21 NTC Thermistor Measurement Support (ADCx)
    22. 7.22 High-Frequency Oscillator
    23. 7.23 Low-Frequency Oscillator
    24. 7.24 Voltage Reference 1
    25. 7.25 Voltage Reference 2
    26. 7.26 Instruction Flash
    27. 7.27 Data Flash
    28. 7.28 Current Protection Thresholds
    29. 7.29 N-CH FET Drive (CHG, DSG)
    30. 7.30 FUSE Drive (AFEFUSE)
    31. 7.31 Battery Charger Voltage Regulation (VFB)
    32. 7.32 Battery Charger Current Sense (HSRP, HSRN)
    33. 7.33 Battery Charger Precharge Current Sense (HSRP, HSRN)
    34. 7.34 AC Adapter Fault Detect (HSRN, VCC)
    35. 7.35 Battery Charger Overcurrent Detection (V)HSRP, (V)HSRN
    36. 7.36 Battery Charger Undercurrent Detection (V)HSRP, (V)HSRN
    37. 7.37 System Operation Detection (V)HSRN
    38. 7.38 Battery Overvoltage Comparator (VFB)
    39. 7.39 Regulator (REGN)
    40. 7.40 PWM High-Side Driver (HiDRV)
    41. 7.41 PWM Low-Side Driver (LoDRV)
    42. 7.42 PWM Information
    43. 7.43 Charger Power-Up Sequence
    44. 7.44 Thermal Shutdown Comparator
    45. 7.45 SMBus High Voltage I/O
    46. 7.46 SMBus
    47. 7.47 SMBus XL
    48. 7.48 Timing Requirements
    49. 7.49 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Safety Features
      2. 8.3.2  Analog Front End (AFE) Details
        1. 8.3.2.1 Wake Up Comparator
        2. 8.3.2.2 Cell Balancing Support
        3. 8.3.2.3 FET Drive
        4. 8.3.2.4 Fuse Drive
      3. 8.3.3  Charge Controller Details
        1. 8.3.3.1 Precharge Modes
        2. 8.3.3.2 Zero-Volt Charge Support
        3. 8.3.3.3 Charge Termination
      4. 8.3.4  Fuel Gauge and Control Details
        1. 8.3.4.1 Battery Trip Point (BTP)
        2. 8.3.4.2 Lifetime Data Logging Features
      5. 8.3.5  Authentication
      6. 8.3.6  LED Display
      7. 8.3.7  Internal Temperature Sensor
      8. 8.3.8  External Temperature Sensor Support
      9. 8.3.9  High Frequency Oscillator
      10. 8.3.10 Communications
        1. 8.3.10.1 SMBus On and Off State
        2. 8.3.10.2 SBS Commands
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Power MOSFETs Selection
        5. 9.2.2.5 Input Filter Design
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Layout
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The bq40z60 is a monolithic charger and gas gauge solution for multi-cell battery packs. By integrating these devices, software control can be handed off from the host microcontroller to the gas gauge controller, providing for potential energy savings that correlate to runtime.

Typical Applications

bq40z60 EVM_Schematic.gif Figure 8. Typical Application Schematic

NOTE

The feedback resistor to VFB from charging output will have different values based on the number of series cells configured for charging the pack.

Design Requirements

For this design example, use the parameters listed in Table 2 as the input parameters.

Table 2. Design Parameters

Design Parameter Example Value
Input Voltage Range 15–22 V
3-Cell Battery Voltage Range 9 V–12.6 V
4-Cell Battery Voltage Range 12 V–16.8 V
Operating Frequency 1000 kHz

Detailed Design Procedure

Inductor Selection

The bq40z60 has a 1000-kHz switching frequency to allow the use of small inductor and capacitor values. Inductor saturation current should be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 1. bq40z60 EQ6_Isat_lus875.gif

The inductor ripple current depends on input voltage (VIN), duty cycle (D = VOUT/VIN), switching frequency (fs) and inductance (L):

Equation 2. bq40z60 EQ7_Iripp_lus875.gif

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. For example, the battery charging voltage range is from 9 V to 12.6 V for a 3-cell battery pack. For 20-V adaptor voltage, 10-V battery voltage gives the maximum inductor ripple current. Another example is a 4-cell battery: The battery voltage range is from 12 V to 16.8 V, and 12-V battery voltage gives the maximum inductor ripple current.

Usually inductor ripple is designed in the range of (20%–40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.

The bq40z60 has cycle-by-cycle charge undercurrent protection (UCP) by monitoring the charging-current sensing resistor to prevent negative inductor current. The typical UCP threshold is 5-mV falling edge corresponding to 0.5-A falling edge for a 10-mΩ charging-current sensing resistor.

Input Capacitor

The input capacitor should have enough ripple-current rating to absorb input switching ripple current. The worst-case RMS ripple current is half of the charging current when the duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst-case capacitor RMS current ICIN occurs where the duty cycle is closest to 50% and can be estimated using the following equation:

Equation 3. bq40z60 EQ8_Icin_lus875.gif

A low-ESR ceramic capacitor such as X7R or X5R is preferred for the input-decoupling capacitor and should be placed to the drain of the high-side MOSFET and source of the low-side MOSFET as close as possible. The voltage rating of the capacitor must be higher than the normal input voltage level. A 25-V or higher-rating capacitor is preferred for 20-V input voltage. 10-µF to 20-µF capacitance is suggested for typical of 3-A to 4-A charging current.

Output Capacitor

Output capacitor also should have enough ripple-current rating to absorb the output switching ripple current. The output capacitor RMS current ICOUT is given:

Equation 4. bq40z60 EQ9_Icout_lus875.gif

The output capacitor voltage ripple can be calculated as follows:

Equation 5. bq40z60 eqad1a_vo_lus892.gif

At a certain input/output voltage and switching frequency, the voltage ripple can be reduced by increasing the output filter LC. The bq40z60 has an internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed between 21 kHz and 27 kHz. The preferred ceramic capacitor has a 25-V or higher rating, X7R or X5R for a 4-cell application.

Power MOSFETs Selection

Two external N-CH MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30-V or higher voltage rating MOSFETs are preferred for 20-V input voltage, and 40 V or higher-rating MOSFETs are preferred for 20-V to 28-V input voltage.

Figure-of-merit (FOM) is usually used for selecting the proper MOSFET based on a tradeoff between the conduction loss and switching loss. For a top-side MOSFET, FOM is defined as the product of the MOSFET on-resistance, rDS(on), and the gate-to-drain charge, QGD. For a bottom-side MOSFET, FOM is defined as the product of the MOSFET on-resistance, rDS(on), and the total gate charge, QG.

Equation 6. bq40z60 EQ10_FOM_lus875.gif

The lower the FOM value, the lower the total power loss. Usually a lower rDS(on) has a higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D = VOUT/VIN), charging current (ICHG), the MOSFET on-resistance tDS(on)), input voltage (VIN), switching frequency (fS), turn-on time (ton), and turn-off time (toff):

Equation 7. bq40z60 EQ11_Ptop_lus875.gif

The first item represents the conduction loss. Usually MOSFET rDS(on) increases by 50% with 100°C junction temperature rise. The second term represents the switching loss. The MOSFET turn-on and turn-off times are given by:

Equation 8. bq40z60 EQ12_ton_lus875.gif

where Qsw is the switching charge, Ion is the turn-on gate-driving current, and Ioff is the turn-off gate driving current. If the switching charge is not given in the MOSFET data sheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):

Equation 9. bq40z60 EQ13_QSW_lus875.gif

Total gate-driving current can be estimated by the REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turn-on gate resistance (Ron), and turn-off gate resistance (Roff) of the gate driver:

Equation 10. bq40z60 EQ14_Ion_lus875.gif

The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous continuous-conduction mode:

Equation 11. bq40z60 EQ15_Pbott_lus875.gif

If the HSRP–HSRN voltage decreases below 5 mV (the charger is also forced into non-synchronous mode when the average HSRP–HSRN voltage is lower than 1.7 mV), the low-side FET is turned off for the remainder of the switching cycle to prevent negative inductor current. As a result, all the freewheeling current goes through the body diode of the bottom-side MOSFET. The maximum charging current in non-synchronous mode can be up to 1.6 A (0.5 A typ) for a 10-mΩ charging-current sensing resistor, considering IC tolerance. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum non-synchronous mode charging current.

MOSFET gate-driver power loss contributes to the dominant losses on the controller IC when the buck converter is switching. The combined high side and low side MOSFET gate charge, Qg_total, is proportional to the power dissipation of the IC, as shown in Equation 12:

Equation 12. bq40z60 eqad2_IC_lus892.gif

Choosing FETs with a lower Qg_total will reduce power loss.

Input Filter Design

During adaptor hot plug-in, the parasitic inductance and input capacitor from the adaptor cable form a second-order system. The voltage spike at the VCC pin may be beyond the IC maximum voltage rating and damage the IC. The input filter must be carefully designed and tested to prevent an overvoltage event on the VCC pin.

There are several methods for damping or limiting the overvoltage spike during adaptor hot plug-in. An electrolytic capacitor with high ESR as an input capacitor can damp the overvoltage spike well below the IC maximum pin voltage rating. A high-current-capability TVS Zener diode can also limit the overvoltage level to an IC safe level. However, these two solutions may not have low cost or small size.

Figure 9 shows a cost-effective and small size solution. The R1 and C1 are composed of a damping RC network to damp the hot plug-in oscillation. As a result, the overvoltage spike is limited to a safe level. D1 is used for reverse voltage protection for the VCC pin (it can be the body diode of input ACFET). C2 is a VCC pin-decoupling capacitor and it should be placed as close as possible to the VCC pin. R2 and C2 form a damping RC network to further protect the IC from high dv/dt and high-voltage spike. The C2 value should be less than the C1 value so R1 can be dominant over the ESR of C1 to get enough of a damping effect for hot plug-in. The R1 and R2 packages must be sized to handle inrush-current power loss according to the resistor manufacturer’s datasheet. The filter component values always must be verified with the real application, and minor adjustments may be needed to fit in the real application circuit.

bq40z60 IP_flt_lus.gif Figure 9. Input Filter

Application Curves

bq40z60 Apps_LoadSteps.png
1 A/div (on both channels)
4 s/div Timescale
Figure 10. Battery Current with Load Steps
bq40z60 Apps_PhaseNode.png
10 V/div
400 ns/div Timescale
Figure 11. Charge Controller Phase (Switch) Node Operation During Constant Current Charging