JAJSOV7C december   2020  – july 2023 CC2662R-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Functional Block Diagram
  6. 5 Revision History
  7. 6 Device Comparison
  8. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package (Top View)
    2. 7.2 Signal Descriptions
    3. 7.3 Connections for Unused Pins and Modules
  9. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  Receive (RX)
    10. 8.10 Transmit (TX)
    11. 8.11 Timing and Switching Characteristics
      1. 8.11.1 Reset Timing
      2. 8.11.2 Wakeup Timing
      3. 8.11.3 Clock Specifications
        1. 8.11.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 8.11.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 8.11.3.3 2 MHz RC Oscillator (RCOSC_MF)
        4. 8.11.3.4 32.768 kHz Crystal Oscillator (XOSC_LF)
        5. 8.11.3.5 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.11.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.11.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       34
      5. 8.11.5 UART
        1. 8.11.5.1 UART Characteristics
    12. 8.12 Peripheral Characteristics
      1. 8.12.1 ADC
        1.       Analog-to-Digital Converter (ADC) Characteristics
      2. 8.12.2 DAC
        1. 8.12.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.12.3 Temperature and Battery Monitor
        1. 8.12.3.1 Temperature Sensor
        2. 8.12.3.2 Battery Monitor
      4. 8.12.4 Comparators
        1. 8.12.4.1 Continuous Time Comparator
        2. 8.12.4.2 Low-Power Clocked Comparator
      5. 8.12.5 Current Source
        1. 8.12.5.1 Programmable Current Source
      6. 8.12.6 GPIO
        1. 8.12.6.1 GPIO DC Characteristics
    13. 8.13 Typical Characteristics
      1. 8.13.1 MCU Current
      2. 8.13.2 RX Current
      3. 8.13.3 TX Current
      4. 8.13.4 RX Performance
      5. 8.13.5 TX Performance
      6. 8.13.6 ADC Performance
  10. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
    4. 9.4  Memory
    5. 9.5  Sensor Controller
    6. 9.6  Cryptography
    7. 9.7  Timers
    8. 9.8  Serial Peripherals and I/O
    9. 9.9  Battery and Temperature Monitor
    10. 9.10 µDMA
    11. 9.11 Debug
    12. 9.12 Power Management
    13. 9.13 Clock Systems
    14. 9.14 Network Processor
  11. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  12. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 Tools and Software
      1. 11.2.1 SimpleLink™ Microcontroller Platform
    3. 11.3 Documentation Support
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2 Signal Descriptions

Table 7-1 Signal Descriptions – RGZ Package
PIN I/O TYPE DESCRIPTION
NAME NO.
DCDC_SW 33 — Power Output from internal DC/DC converter(1)
DCOUPL 23 — Power 1.27-V regulated digital-supply (decoupling capacitor)(2)
DIO_0 5 I/O Digital GPIO, Sensor Controller
DIO_1 6 I/O Digital GPIO, Sensor Controller
DIO_2 7 I/O Digital GPIO, Sensor Controller
DIO_3 8 I/O Digital GPIO, Sensor Controller
DIO_4 9 I/O Digital GPIO, Sensor Controller
DIO_5 10 I/O Digital GPIO, Sensor Controller, high-drive capability
DIO_6 11 I/O Digital GPIO, Sensor Controller, high-drive capability
DIO_7 12 I/O Digital GPIO, Sensor Controller, high-drive capability
DIO_8 14 I/O Digital GPIO
DIO_9 15 I/O Digital GPIO
DIO_10 16 I/O Digital GPIO
DIO_11 17 I/O Digital GPIO
DIO_12 18 I/O Digital GPIO
DIO_13 19 I/O Digital GPIO
DIO_14 20 I/O Digital GPIO
DIO_15 21 I/O Digital GPIO
DIO_16 26 I/O Digital GPIO, JTAG_TDO, high-drive capability
DIO_17 27 I/O Digital GPIO, JTAG_TDI, high-drive capability
DIO_18 28 I/O Digital GPIO
DIO_19 29 I/O Digital GPIO
DIO_20 30 I/O Digital GPIO
DIO_21 31 I/O Digital GPIO
DIO_22 32 I/O Digital GPIO
DIO_23 36 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_24 37 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_25 38 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_26 39 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_27 40 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_28 41 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_29 42 I/O Digital or Analog GPIO, Sensor Controller, analog
DIO_30 43 I/O Digital or Analog GPIO, Sensor Controller, analog
EGP — — GND Ground – exposed ground pad
JTAG_TMSC 24 I/O Digital JTAG TMSC, high-drive capability
JTAG_TCKC 25 I Digital JTAG TCKC
RESET_N 35 I Digital Reset, active low. No internal pullup resistor
RF_P 1 — RF Positive RF input signal to LNA during RX
Positive RF output signal from PA during TX
RF_N 2 — RF Negative RF input signal to LNA during RX
Negative RF output signal from PA during TX
VDDR 45 — Power 1.7-V to 1.95-V supply, must be powered from the internal DC/DC converter or the internal Global LDO(3)(2)
VDDR_RF 48 — Power 1.7-V to 1.95-V supply, must be powered from the internal DC/DC converter or the internal Global LDO(4)(2)
VDDS 44 — Power 1.8-V to 3.63-V main chip supply(1)
VDDS2 13 — Power 1.8-V to 3.63-V DIO supply(1)
VDDS3 22 — Power 1.8-V to 3.63-V DIO supply(1)
VDDS_DCDC 34 — Power 1.8-V to 3.63-V DC/DC converter supply
X48M_N 46 — Analog 48-MHz crystal oscillator pin 1
X48M_P 47 — Analog 48-MHz crystal oscillator pin 2
X32K_Q1 3 — Analog 32-kHz crystal oscillator pin 1
X32K_Q2 4 — Analog 32-kHz crystal oscillator pin 2
(1) For more details, see the technical reference manual listed in Section 11.3.
(2) Do not supply external circuitry from this pin.
(3) If internal DC/DC converter is not used, this pin is supplied internally from the Global LDO.
(4) If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the Global LDO.