SLPS497A June   2014  – May 2017 CSD17576Q5B

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5B Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Pattern
    4. 7.4 Q5B Tape and Reel Information

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デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
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発注情報

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain to Source Voltage VGS = 0 V, ID = 250 μA 30 V
IDSS Drain to Source Leakage Current VGS = 0 V, VDS = 24 V 1 μA
IGSS Gate to Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = 250 μA 1.1 1.4 1.8 V
RDS(on) Drain to Source On Resistance VGS = 4.5 V, ID = 25 A 2.4 2.9 mΩ
VGS = 10 V, ID = 25 A 1.7 2.0 mΩ
gfs Transconductance VDS = 3 V, ID = 25 A 120 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0V, VDS = 15 V, ƒ = 1 MHz 3410 4430 pF
Coss Output Capacitance 389 506 pF
Crss Reverse Transfer Capacitance 151 196 pF
RG Series Gate Resistance 1.0 2.0 Ω
Qg Gate Charge Total (4.5 V) VDS = 15 V, ID = 25 A 25 32 nC
Qg Gate Charge Total (10 V) 53 68 nC
Qgd Gate Charge Gate to Drain 5.4 nC
Qgs Gate Charge Gate to Source 8.9 nC
Qg(th) Gate Charge at Vth 4.7 nC
Qoss Output Charge VDS = 30 V, VGS = 0 V 12.3 nC
td(on) Turn On Delay Time VDS = 15 V, VGS = 10 V,
IDS = 25 A, RG = 0 Ω		 5 ns
tr Rise Time 16 ns
td(off) Turn Off Delay Time 23 ns
tf Fall Time 3 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage ISD = 25 A, VGS = 0V 0.8 1 V
Qrr Reverse Recovery Charge VDS= 15 V, IF = 25 A,
di/dt = 300 A/μs		 14.7 nC
trr Reverse Recovery Time 14 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance (1) 1.3 °C/W
RθJA Junction-to-Ambient Thermal Resistance (1)(2) 50
(1) RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.

CSD17576Q5B M0137-01_LPS198.gif
Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick) Cu.
CSD17576Q5B M0137-02_LPS198.gif
Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz. (0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
CSD17576Q5B graph01_SLPS497.png
Figure 1. Transient Thermal Impedance
CSD17576Q5B graph02_SLPS497.png
Figure 2. Saturation Characteristics
CSD17576Q5B graph04_SLPS497.png
ID = 25 A VDS = 15 V
Figure 4. Gate Charge
CSD17576Q5B graph06_SLPS497.png
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD17576Q5B graph08_SLPS497.png
ID = 25 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD17576Q5B graph10_SLPS497.png
Single Pulse Max RθJC = 1.3°C/W
Figure 10. Maximum Safe Operating Area
CSD17576Q5B graph12_SLPS497.png
Figure 12. Maximum Drain Current vs Temperature
CSD17576Q5B graph03_SLPS497.png
VDS = 5 V
Figure 3. Transfer Characteristics
CSD17576Q5B graph05_SLPS497.png
Figure 5. Capacitance
CSD17576Q5B graph07_SLPS497.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD17576Q5B graph09_SLPS497.png
Figure 9. Typical Diode Forward Voltage
CSD17576Q5B graph11_SLPS497.png
Figure 11. Single Pulse Unclamped Inductive Switching