SLAS719E August   2010  – June 2015 DAC7562 , DAC7563 , DAC8162 , DAC8163 , DAC8562 , DAC8563

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: Internal Reference
      2. 7.7.2 Typical Characteristics: DAC at AVDD = 5.5 V
      3. 7.7.3 Typical Characteristics: DAC at AVDD = 3.6 V
      4. 7.7.4 Typical Characteristics: DAC at AVDD = 2.7 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital-to-Analog Converter (DAC)
        1. 8.3.1.1 Resistor String
        2. 8.3.1.2 Output Amplifier
      2. 8.3.2 Internal Reference
      3. 8.3.3 Power-On Reset
        1. 8.3.3.1 Power-On Reset to Zero-Scale
        2. 8.3.3.2 Power-On Reset to Mid-Scale
        3. 8.3.3.3 Power-On Reset (POR) Levels
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
        1. 8.4.1.1 DAC Power-Down Commands
      2. 8.4.2 Gain Function
      3. 8.4.3 Software Reset Function
      4. 8.4.4 Internal Reference Enable Register
        1. 8.4.4.1 Enabling Internal Reference
        2. 8.4.4.2 Disabling Internal Reference
      5. 8.4.5 CLR Functionality
      6. 8.4.6 LDAC Functionality
    5. 8.5 Programming
      1. 8.5.1 SYNC Interrupt
      2. 8.5.2 DAC Register Configuration
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 DAC Internal Reference
        1. 9.1.1.1 Supply Voltage
        2. 9.1.1.2 Temperature Drift
        3. 9.1.1.3 Noise Performance
        4. 9.1.1.4 Load Regulation
          1. 9.1.1.4.1 Long-Term Stability
        5. 9.1.1.5 Thermal Hysteresis
      2. 9.1.2 DAC Noise Performance
    2. 9.2 Typical Applications
      1. 9.2.1 Combined Voltage and Current Analog Output Module Using the XTR300
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Up to ±15-V Bipolar Output Using the DAC8562
    3. 9.3 System Examples
      1. 9.3.1 MSP430 Microprocessor Interfacing
      2. 9.3.2 TMS320 McBSP Microprocessor Interfacing
      3. 9.3.3 OMAP-L1x Processor Interfacing
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

A precision analog component requires careful layout, adequate bypassing, and clean, well-regulated power supplies. The DAC756x, DAC816x, and DAC856x devices offer single-supply operation, and are often used in close proximity with digital logic, microcontrollers, microprocessors, and digital signal processors. The more digital logic present in the design and the higher the switching speed, the more difficult it is to keep digital noise from appearing at the output. As a result of the single ground pin of the DAC756x, DAC816x, and DAC856x devices, all return currents (including digital and analog return currents for the DAC) must flow through a single point. Ideally, GND would be connected directly to an analog ground plane. This plane would be separate from the ground connection for the digital components until they were connected at the power-entry point of the system. The power applied to AVDD should be well-regulated and low noise. Switching power supplies and dc-dc converters often have high-frequency glitches or spikes riding on the output voltage. In addition, digital components can create similar high-frequency spikes as their internal logic switches states. This noise can easily couple into the DAC output voltage through various paths between the power connections and analog output. As with the GND connection, AVDD should be connected to a power-supply plane or trace that is separate from the connection for digital logic until they are connected at the power-entry point. In addition, a pair of 100-pF to 1-nF capacitors and a 0.1-µF to 1-µF bypass capacitor are strongly recommended. In some situations, additional bypassing may be required, such as a 100-µF electrolytic capacitor or even a pi filter made up of inductors and capacitors – all designed essentially to provide low-pass filtering for the supply and remove the high-frequency noise.

11.2 Layout Example

DAC7562 DAC7563 DAC8162 DAC8163 DAC8562 DAC8563 layout_SLAS719.gifFigure 103. DACxx6x Layout Example