JAJSF42B April 2018 – June 2019 DLPC3478
The DLPC3478 device contains a test point output port, TSTPT_(7:0), which provides selected system calibration support as well as ASIC debug support. These test points are inputs while reset is applied and switch to outputs when reset is released. The state of these signals is sampled upon the release of system reset and the captured value configures the test mode until the next time reset is applied. Each test point includes an internal pulldown resistor, thus external pullups must be used to modify the default test configuration. The default configuration (x000) corresponds to the TSTPT_(7:0) outputs remaining tri-stated to reduce switching activity during normal operation. For maximum flexibility, an option to jumper to an external pullup is recommended for TSTPT_(2:0). Pullups on TSTPT_(6:3) are used to configure the ASIC for a specific mode or option. TI does not recommend adding pullups to TSTPT_(7:3) because this has adverse affects for normal operation. This external pullup value is sampled only during a 0-to-1 transition on the RESETZ input, thus changing the configuration after reset is released and has no effect until the next time reset is asserted and released. Table 11 defines the test mode selection for one programmable scenario defined by TSTPT(2:0).
|TSTPT(2:0) CAPTURE VALUE||NO SWITCHING ACTIVITY||CLOCK DEBUG OUTPUT|
|TSTPT(2)||HI-Z||0.7 to 22.5 MHz|